Overview
In this seminar, engineers from MathWorks and Cadence present a new workflow to produce highly optimized ASIC implementations from MATLAB code. HDL Coder generates synthesizable SystemC code from MATLAB code. This SystemC code can then be used as an design input to the Stratus High-Level Synthesis tool from Cadence. Stratus gives ASIC design teams early and accurate visibility on power-performance-area (PPA), with an automated path from MATLAB to optimized RTL that yields optimized micro-architectures.
Join us to learn how this integration shortens design schedules and delivers designs with superior PPA. Using demos, you will see how to start with a MATLAB floating-point design and testbench, convert it to fixed-point, generate SystemC code, and verify it against MATLAB code. Then we will show how Cadence Stratus synthesizes RTL, using Genus Synthesis and Joules RLT Power analysis to obtain early PPA results.
Highlights
- Overviews of HDL Coder and Stratus High-Level Synthesis
- Case study: AES module
- Demo: Generating SystemC from MATLAB using HDL Coder
- Demo: Creating Stratus project files and performing design space exploration
- Live Q&A
About the Presenter
Tom Henige is an application engineer with MathWorks, where he supports customers using the company’s HDL code generation and verification products. Tom has more than 20 years of experience in FPGA design and verification. His previous work includes next-generation wireless systems at Samsung Research America, communications and telemetry development for aerospace at Southwest Research Institute, and data acquisition systems at Texas Instruments. Tom earned a Bachelor of Science in Electrical Engineering from Texas A&M University and holds several patents in channel coding hardware implementations.
Jeff Roane is a Director of Product Management for Stratus High-Level Synthesis at Cadence. He has extensive experience in both semiconductor design and EDA having served in engineering and product management roles at Electronics, Semiconductor, and EDA companies including Texas Instruments, Synopsys, and Dell Technologies. Jeff earned a BSEE from the University of Akron and holds four patents for System and method for automated electronic device design.
