Floating Point IP Library Parameters

You can access the floating-point parameters in the HDL Code Generation > Floating Point pane in the Configuration Parameters dialog box.

Use Floating Point

Use the native floating-point library in your design. You can specify the latency strategy and whether to handle denormal numbers in your design. See Native Floating-Point Parameters.

Settings

Default: Off

On: Map your design to the native floating-point target library.
Off: Do not map your design to the native floating-point target library.

Command-Line Information

Parameter: UseFloatingPoint

Type: character vector

Value: 'on' | 'off'

Default: 'off'

To set this property, use the functions hdlset_param or makehdl. To view the property value, use the function hdlget_param.

For example, you can enable the UseFloatingPoint setting when you generate HDL code for the symmetric_fir subsystem inside the sfir_single model by using either of these methods:

Pass the property as an argument to the makehdl function.

makehdl('sfir_single/symmetric_fir', ... 
        'UseFloatingPoint','on')

When you use hdlset_param, set the parameter on the model and then generate HDL code by using makehdl.
```
hdlset_param('sfir_single','UseFloatingPoint','on')
makehdl('sfir_single/symmetric_fir')
```

Vendor Specific Floating Point Library

Select a vendor-specific floating-point library in your design, based on the setting of the Synthesis Tool parameter and use the library in combination with a native floating-point (NFP) library. Using a NFP and vendor-specific floating point library together in a mixed design more efficiently uses resources on the FPGA, such as hardened DSP floating point adder or multiplier primitives, which allows you to fit a bigger design into the FPGA fabric.

Settings

Default: None

The options are:

None: Use only the native floating-point mode to target ASIC devices or generate vendor-independent code that you can use on different FPGA or SoC devices.
ALTERAFPFUNCTIONS: Specify Altera^® Megafunctions (ALTERA FP FUNCTIONS) as the floating-point target library. You can provide the IP target frequency.
ALTFP: Specify Altera Megafunctions (ALTFP) as the floating-point target library. You can provide the objective and latency strategy for the IP.
XILINXLOGICORE: Specify Xilinx^® LogiCORE^® as the floating-point target library. You can provide the objective and latency strategy for the IP.

Dependency

To specify this parameter, set the Synthesis Tool parameter to your target tool and select Use Floating Point. The options for Vendor Specific Floating Point Library depend on the synthesis tool you select.

Command-Line Information

To set the vendor-specific floating-point library:

Use the hdlcoder.createFloatingPointTargetConfig function to create a floating-point IP configuration object, hdlcoder.FloatingPointTargetConfig, for the floating-point library. For example, to create a mixed-mode floating-point target configuration with the native floating point library and the ALTERA FP FUNCTIONS library as the vendor-specific floating point library, use this command:
```
fpconfig = hdlcoder.createFloatingPointTargetConfig("NativeFloatingPoint",...
   VendorFloatingPointLibrary = "AlteraFPFunctions");
```
Set the floating-point target configuration on the model and generate HDL code. For example, to set the configuration on the sfir_single model and generate HDL code for the symmetric_fir subsystem, enter:
```
hdlset_param("sfir_single", FloatingPointTargetConfiguration = fpconfig);
makehdl('sfir_single/symmetric_fir')
```

To get the floating point target configuration object from the model, enter:

fpconfig = hdlget_param("sfir_single", 'FloatingPointTargetConfiguration')