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Logic

R2026a
用于集成电路的逻辑门，例如 CMOS AND、CMOS OR 和 CMOS NOT

结合实现布尔函数的逻辑门，产生单一逻辑输出。

Simscape 模块

CMOS AND blockCMOS ANDBehavioral model of CMOS AND gate
CMOS Buffer blockCMOS BufferBehavioral model of CMOS Buffer gate
CMOS NAND blockCMOS NANDBehavioral model of CMOS NAND gate
CMOS NOR blockCMOS NORBehavioral model of CMOS NOR gate
CMOS NOT blockCMOS NOTBehavioral model of CMOS NOT gate
CMOS OR blockCMOS ORBehavioral model of CMOS OR gate
CMOS XOR blockCMOS XORBehavioral model of CMOS XOR gate
D Flip-Flop blockD Flip-FlopBehavioral model of D flip-flop (自 R2024a 起)
D Latch blockD LatchBehavioral model of D latch (自 R2024a 起)
S-R Latch blockS-R LatchBehavioral model of S-R Latch
Schmitt Trigger blockSchmitt TriggerBehavioral model of Schmitt trigger

主题