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Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC4x Microcontrollers

This example shows how you can use SoC Blockset™ Support Package for Infineon AURIX Microcontrollers to implement multicore modeling and communication between two cores on an Infineon® AURIX™ microcontroller. This example uses a top-level model and two referenced models for two-way multicore data communication. After trying out the simulation for verifying the communication between the cores, you can deploy the code on an Infineon AURIX TC4xx TriBoard using Soc Builder tool and observe that the LEDs that you configured for each core are blinking.

Open Top-Level Model and Perform Hardware Mapping of IPC Event and Peripherals

Open the top-level tc4x_IpcTopModel.slx model.

The model consists of two Interprocess Data Channel blocks that connect the two referenced models and help you to define the two-way interprocessor data channel between the two cores - TriCore0 and TriCore1.

TriCore0 referenced model (tc4x_IpcTriCore0.slx) has a discrete rate of 500 milliseconds. TriCore1 referenced model (tc4x_IpcTriCore1.slx) is triggered by the IPCEvent, which is defined using the Hardware Mapping tool (open Hardware tab on the Simulink toolstrip, and click Hardware Mapping).

This example model uses three LEDs on the Infineon AURIX TC4xx board to help you verify data communication between the participating cores:

  • TriCore0 uses Port 13, Pin 0 for Digital Port Write block; and Port 33, Pin 0 for Digital Port Write1 block

  • TriCore1 uses Port 33, Pin 1 for Digital Port Write block

You define these pins using the Hardware Mapping tool, as shown in these three figures.

This configuration of peripherals ensures that the following data flow is implemented using LEDs upon deployment of the model on the board:

  • LEDs Port 33-Pin 0 and Port 33-Pin 1 blink simultaneously and in sync when data is sent from TriCore0 to TriCore1 using the Interprocess Data Channel block available at the top part of the model. This data flow implies that TriCore1 receives and processes data asynchronously even though the two cores are running at different rates.

  • LED Port 13-Pin 0 blinks with an offset of 1 sample when data is sent from TriCore1 to TriCore0 using the Interprocess Data Channel1 block available at the bottom part of the model. This data flow implies that bi-directional communication between cores of Infineon AURIX TC4xx TriBoard can be achieved by applying offsets.

Define Configuration Parameters for TriCore0 and Analyze the Model

1. Open the TriCore0 referenced tc4x_IpcTriCore0.slx model.

2. Press Ctrl+E or click Modeling > Model Settings to open Configuration Parameters dialog box.

3. Select the Hardware Implementation pane and ensure that the following parameters are set to define the communication between TriCore0 and TriCore1.

The input data transferred to TriCore0 is a 1 X 2 vector of type uint16.

Define Configuration Parameters for TriCore1 and Analyze the Model

1. Open the TriCore1 referenced tc4x_IpcTriCore1.slx model.

2. Press Ctrl+E or click Modeling > Model Settings to open Configuration Parameters dialog box.

3. Select the Hardware Implementation pane and ensure that the Processing Unit is set correctly. There is no need to define TriCore0 as the core to which TriCore1 communicates because TriCore0 can communicate with all cores.

Simulate the Model for IPC Communication Between TriCore0 and TriCore1

Send a pulse signal to TriCore0 for blinking the LED at every 0.5s and simulate the model. You can observe that TC0_Tx_Led and TC1_Rx_Led are in sync, as TriCore1 is triggered via IPC Interrupt.

Now, send a repeating staircase signal of [10,20,30,40,50] to TriCore0 and simulate the model. You can observe that TC0_Tx_Led and TC1_Rx_Led are in sync, as TriCore1 is triggered via IPC Interrupt.

Send a pulse signal to TriCore1 for blinking the LED. The signal TC1_Rx_Led is fed as TC1_Tx to the Interprocess Data Write block in TriCore1. This data is received via Interprocess Data Read on TriCore0. TC1_Rx_Led (TC1_Tx) and TC0_Rx_Led are offset by 1 sample. This is because TriCore0 is run at a discrete rate, and it receives the IPC data sent by TriCore1 in the next sample.

Now, send a repeating staircase signal of [110,120,130,140,150] to TriCore1 and simulate the model. TC1_Rx_Led (TC1_Tx) and TC0_Rx_Led are offset by 1 sample.

Generate Code and Run Model to Target Hardware

Complete the following steps to generate code and run the model on the target hardware.

1. Click Configure, Build, Deploy & Start on the Hardware tab to launch the SoC Builder tool.

2. In the SoC Builder, prepare the model by first specifying the folder to use for project generation. Click Next.

3. In the Review Hardware Mapping section, click View/Edit to confirm the Hardware Mapping. Click Next

4. In the Validate Model section, click Validate to check the model against the selected board (Infineon AURIX TC4x - Triboards).

If the message - Model validation successfully finished - appears, click Next.

5. In the next section Build Model, click Build. This process generates the binary executable. Click Next after the build is successful.

6. Connect the hardware (Infineon AURIX Tc4x board) to the host computer.

7. In the Soc Builder screen, and click Load and Run. This action loads the generated binary to the connected board, programs the processor, and runs the application. Click Finish to close the SoC Builder.

7. Use the One Eye tool from Infineon to monitor the signal from the hardware. One Eye tool requires DAS tool, download and install the latest version of DAS, if not installed using the Hardware Setup.

8. Load the One Eye configuration file tc4x_IpcTopModel. OneEye in the One Eye tool, by clicking File -> Load Configuration. Load the generated tc4x_IpcTopModel_sw_TriCore0.elf file by clicking Load ELF file in Debug box viewer. Reset the hardware and check the DAS connection status to monitor the signals.

9. Load the generated tc4x_IpcTopModel_sw_TriCore1.elf file by clicking Load ELF file in Debug box viewer. Reset the hardware and check the DAS connection status to monitor the signals

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