Main Content

PWM Generator (Interpolation)

Carrier-based unipolar PWM generation with interpolation

expand all in page
  • PWM Generator (Interpolation) block

Libraries:
Simscape / Electrical / Specialized Power Systems / Power Electronics / Power Electronics Control

Description

The PWM Generator (Interpolation) block generates pulses for PWM-controlled power electronics converters by using a carrier-based, unipolar PWM method with interpolation.

The block can control switching devices with two-quadrant converters, single-phase full-bridges, two-level three-phase bridges, or three-level three-phase bridges. The reference signal at the Vref port, also called the modulating signal, is compared with a symmetrical triangle carrier. When the reference signal is greater than the carrier, the pulse for the upper switching device is high (1), and the pulse for the lower device is low (0). The generator uses this unipolar modulation technique to control each arm independently. A second reference signal is internally generated by phase-shifting the original reference signal by 180 degrees.

The interpolation method takes into account switching events that occur between the two sample times of the generator and computes the time delays to capture the evolution of the states at different switching times. The block computes the pulse delays sent to the power electronic gate inputs when the Use time stamped gate signals option of the powergui block is enabled.

This figure shows Pulse 1 of the output port P, delay 1 of the output port DelayOn and delay 1 of the output port DelayOff.

Every time the pulse signal enters the on state, DelayOn outputs a value that corresponds to the exact time delay between the computation step and when the pulse entered the on state. In the figure, the Pulse 1 signal enters the on state at 0.09128 seconds (indicated by the blue arrow). At the same moment, the DelayOn output for Pulse 1 is 1e-5 seconds. Therefore, the exact time Pulse 1 entered the on state was 0.09128 – 1e-5 = 0.09127 seconds.

Similarly, every time the pulse signal enters the off state, DelayOff outputs a value that corresponds to the exact time delay between the computation step and when the pulse entered the off state. In the figure, Pulse 1 enters the off state at 0.09204 seconds (indicated by the red arrow). At this moment, the DelayOff output is equal to 1.09e-5 seconds. Therefore, the exact time Pulse 1 entered the off state was 0.09204 – 1.05e-5 = 0.0920295 seconds.

This time-stamped interpolation technique works only with the following converter blocks:

  • Converters built with individual switch blocks

  • Universal Bridge blocks (for modelling half bridge, full bridge, and two-level three-phase converters)

  • Three-Level Bridge blocks

For more information on the sampling techniques, see the PWM Generator (2-Level) block reference page.

Ports

Input

expand all

Reference voltage signal used to generate the output pulses, specified as a three-phase vector or a single-phase scalar. Connect this input to a single-phase sinusoidal signal to control a single-phase full-bridge converter, or to a three-phase sinusoidal signal to control a three-phase bridge converter. For linear operation of this block, the magnitude at Vref must be between −1 and +1

Dependencies

This port is visible only if Generator type is set to one of these values:

  • Full-bridge, single-phase

  • Two-level, three-phase

  • Three-level, three-phase

.

Data Types: double

Duty cycle of the PWM generator. A value between 0 and 1 determines the percentage of the pulse period that the output is on.

Dependencies

This port is visible only if Generator type is set to Two-quadrant.

Data Types: double

Output

expand all

Output pulses, returned as a vector.

Data Types: double

Output representing the delay between when the pulses entered the on state, returned as a scalar.

Data Types: double

Output representing the delay between when the pulses entered the off state, returned as a scalar.

Data Types: double

Parameters

expand all

Type of generator to control. The number of pulses generated by the block is proportional to the number of bridge arms to fire.

  • Select Two-quadrant to fire the self-commutated devices of a two-quadrant converter. The duty cycle of the generator is specified by the input D, which determines the percentage of the pulse period that the pulse is on. Two pulses are generated.

  • Select Full-bridge, single-phase to fire the self-commutated devices of a single-phase full-bridge converter. Four pulses are generated. Pulses 1 and 3 fire the upper devices of the first and second arm. Pulses 2 and 4 fire the lower devices.

  • Select Two-level, three-phase (default) to fire the self-commutated devices of a three-phase bridge converter. Six pulses are generated. Pulses 1, 3, and 5 fire the upper devices of the first, second, and third arms. Pulses 2, 4, and 6 fire the lower devices.

  • Select Three-level, three-phase to fire the self-commutated devices of a three-level three phase bridge. Twelves pulses are generated. Pulses (1, 2), (5, 6), and (9, 10) fire the upper devices of the first, second, and third arms. Pulses (3, 4), (7, 8), and (11, 12) fire the lower devices of the three arms.

Frequency, in Hz, of the triangular carrier signal. The value must be greater than 0

Carrier signal initial phase, in deg. A value of 90 degrees means that the triangle carrier initial position is set to the midpoint between its minimum and maximum value and the slope is positive.

Sample time of the block, in s. The value must be positive and greater than 0.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Version History

Introduced in R2019b

See Also

| | | | |