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Frequency distribution of pixel values in video stream

  • Histogram block

Vision HDL Toolbox / Statistics


The Histogram block computes the frequency distribution of pixel values in a video stream. You can configure the number and size of the bins. The block provides a read interface for accessing each bin. The block keeps a running histogram until you reset the bin values.


This block uses a streaming pixel interface with a bus for frame control signals. This interface enables the block to operate independently of image size and format. All Vision HDL Toolbox™ blocks use the same streaming interface. The block accepts a scalar pixel value and a bus that contains five control signals. The control signals indicate the validity of each pixel and its location in the frame. To convert a frame (pixel matrix) into a pixel stream and control signals, use the Frame To Pixels block. For a full description of the interface, see Streaming Pixel Interface.


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This block supports single pixel streaming or multipixel streaming. For single pixel streaming, specify a single input pixel as a scalar intensity value. For multipixel streaming, specify a vector of two, four, or eight pixel intensity values. For details of how to set up your model for multipixel streaming, see Filter Multipixel Video Streams.

This block does not support multicomponent streaming. To process multicomponent streams, replicate the block for each component. The pixelcontrol bus for all components is identical, so you can connect a single bus to multiple replicated blocks.

The software supports double and single data types for simulation, but not for HDL code generation.

Data Types: uint | fixdt(0,W,0) | Boolean | double | single

The pixelcontrol bus contains five signals. The signals describe the validity of the pixel and its location in the frame. For more information, see Pixel Control Bus.

For multipixel streaming, each vector of pixel values has one set of control signals. Because the vector has only one valid signal, the pixels in the vector must be either all valid or all invalid. The hStart and vStart signals apply to the pixel with the lowest index in the vector. The hEnd and vEnd signals apply to the pixel with the highest index in the vector.

Data Types: bus

The block captures this value each cycle that the readRdy output port is 1 (true). The data type is fixdt(0,W,0), W = 5,6,...,12. The word length must be log2(Number of bins).

Data Types: fixdt(0,W,0)

A binReset value of 1 (true) triggers a RAM initialization sequence that resets the histogram bin values. Reset takes NumBins cycles to clear all locations. Input signals are ignored during this interval.

Data Types: Boolean


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When readRdy is 1 (true), the histogram bins are ready to read. The block returns readRdy set to 1 (true) two cycles after the final pixel of a frame.

Data Types: Boolean

Histogram bin value corresponding to the requested address, binAddr. The Data type parameter specifies the data type for this value.

Data Types: fixed point

When validOut is 1 (true), the histogram bin value, hist, is valid.

Data Types: Boolean


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Choose the number of bins depending on the input word length (WL). If the number of bins is less than 2WL, the block truncates the least-significant bits of each pixel. If the number of bins is greater than 2WL, some bins are not used, and after you synthesize your design it will use more hardware resources than necessary.

Data type of histogram bin values.

The software supports double and single data types for simulation, but not for HDL code generation.

Word length of the histogram bins. If a bin overflows, the count saturates and the block shows a warning.


This parameter applies when you set Data type to Unsigned fixed point.


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Extended Capabilities

Version History

Introduced in R2015a

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See Also




  • (Image Processing Toolbox)