Does Simulink Design Verifier support filtering exclusions​/justifica​tions in Design Error Detection analysis?

11 次查看(过去 30 天)
I am running Design Verifier's design error detection on a model and would like to filter/exclude some blocks from the analysis results, as I would with a coverage filter if I were doing coverage analysis.
Is this possible?

采纳的回答

MathWorks Support Team
编辑:MathWorks Support Team 2021-10-19
Yes, as of R2019b you can apply filters to Design Verifier Design Error Detection tests to apply justifications/exclusions by enabling the "Ignore objectives based on filter" option, and specifying a coverage filter in Model Settings.
The coverage filter can be modified to include exclusions applied to all blocks with the same library reference; in this way you can "bulk exclude" dead logic results from analysis by filtering against the library reference.
A description of this workflow and an example are available on the following two documentation pages:
Additional Note: there is an option to apply the filter only for Dead Logic Detection analysis specifically from within the Simulink Coverage toolbox.
Enabling "Make justification filter rules for dead logic" from within the Coverage Results explorer will automatically justify all dead logic identified by Design Verifier. This method does not confirm that the identified dead logic is intended or acceptable, and thus should still be reviewed by the user. This is described in the following documentation page:
Additionally, if you want to check for Dead logic in the Library block itself, you can create a harness for the library block (in the main library model), change the solver to 'Fixed Step' in the generated harness, and perform Design Error Detection checks.

更多回答(0 个)

类别

Help CenterFile Exchange 中查找有关 Address Missing Coverage 的更多信息

产品


版本

R2019b

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by