- Make sure the ADC interrupt has a priority high enough for the DSP to respond to it right away. The IER, IPR, and IFR registers in the interrupt vector table can be changed to adjust the interrupt priority level.
- The amount of processing time available for the ADC interrupt may be constrained if your DSP is handling multiple active interrupts at once. If feasible, try briefly turning off other interrupts to see if the ADC interrupt frequency changes.
- Examine your code for any inefficient loops or procedures that can be consuming excessive amounts of processing time. To locate any performance bottlenecks and modify your code appropriately, utilise a profiler.
- Verify that the sampling time and ADC PLL are configured correctly and are performing as expected. The sample window and ADC interrupt must be in line with each other for the ADC to be sampling at the proper frequency and frequency, respectively.
- In some circumstances, an application's real-time needs may go beyond what the DSP can handle. Verify that the timing limitations can be met and that your DSP has enough processing capability.
I want to measure the execution of ADC on 28335 DSP by toggling GPIO_0 and EOC interrupt
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I want to measure the execution of ADC on 28335 DSP by toggling GPIO_0 and EOC interrupt. I set the ADC PLL to give 40ns samping (max by datasheet). I set the sampling time to inherit in ADC block and set "Post interrupt at the end of conversion" option. The interrupt table setting CPU:1 and PIE:1, which successfully toggles the GPIO_0 pin, but at 5 Hz frequency.
Whe I set the sampling time of the ADC block to more than 400KHz (way less than the intended sampling window), the frequency measured at the oscilloscope output is irrigular and random.
It seems like your ADC interrupt frequency is much lower than intended. This could be caused by various factors such as interrupt priority, CPU load, and timing constraints.
Here are some suggestions that may help improve the ADC interrupt frequency:
You might also think about triggering the ADC interrupt at a more accurate frequency using the DSP's on-chip hardware timers. This may improve timing precision and lighten the workload placed on the DSP's interrupt handling programmes.