How to configure 64 bit atomic access for a sparc processor for Polyspace Bug Finder analysis to get the right data race conditions

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Konrad Mayer
Konrad Mayer 2017-9-12
How to configure 64 bit atomic access for a sparc processor for Polyspace Bug Finder analysis to get the right data race conditions. We use SPARC V8 hardware which supports memory read/write atomic access for double word (so 64 bits). Polyspace reports data race conditions as it supposes non atomic access. How can I configure Polyspace so that it processes our data access correctly.

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