AMD FPGA and SoC support from HDL Coder

Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for AMD FPGA and SoC devices

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Capabilities and Features

HDL Coder™ enables implementation of Simulink models and MATLAB algorithms onto Xilinx^® FPGA and SoC devices for fast prototyping on hardware using the HDL Coder Support Package for Xilinx FPGA and SoC Devices. Using HDL Coder workflow, you can select the FPGA and SoC device, map your algorithm I/O to onboard interfaces, generate HDL IP core, and synthesize the generated code. HDL coder also provides integration with Xilinx tools to integrate the generated HDL IP core into the FPGA or SoC reference designs to generate bitstream that you can directly download on to the Xilinx FPGA or SoC devices, such as Zynq, Zynq Ultrascale+ MPSoC, Zynq Ultrascale+ RFSoC , and Versal Adaptive SoC devices. When used in combination with Embedded Coder, this solution can be utilized in a hardware/software workflow spanning simulation, C and HDL code generation, prototyping, verification, and implementation on a complete Xilinx SoC device.

Starting in R2024a,