FPGA Design with MATLAB
This video series will show you how to adapt your signal processing algorithms for FPGA design. Using a pulse detection algorithm as an example, this tutorial-style series starts with the basics of what is needed for successful FPGA design, and incrementally adapts the algorithm to ready it for automatic implementation.
Learn how to adapt a signal processing application for FPGA design using MATLAB and Simulink.
Use Simulink and HDL-ready blocks to design and visualize the high-level architecture of your FPGA design.
Architecting Efficient Hardware
Learn how to balance speed and area optimization of hardware micro-architecture for RTL generation.
Quantize data types to reduce hardware resources in the FPGA design while maintaining sufficient precision.
Generating and Synthesizing RTL
Use the HDL Workflow Advisor to prepare, generate, synthesize, and analyze the RTL.
