CMSIS Conditions for DSP Blocks to Support ARM Cortex Processors

DSP blocks that can be used with the Support Package for ARM^® Cortex^®-M processors require specific conditions to allow code replacement with the CMSIS Library. You use this code replacement when generating C code from a model. The support package do not support any multi-rate DSP blocks in the ARM CRL library. The CMSIS library supports these DSP blocks only when you set specific properties, as indicated in the following table:

Note

In the Fixed-point mode of the CMSIS DSP functions (FIR and Biquad filters), Wrap is used for intermediate MAC operations if accumulator result overflows. At the end, the accumulator is right shifted and saturated to the output data type. For discrete FIR and Biquad filter blocks, there is only one overflow setting for accumulator and output. So if overflow happens in accumulation, the simulation result will not match the CMSIS library result. If Overflow Mode is set to 'Wrap' or SaturateOn IntegerOverflow is turned off and only the output overflows, the simulation result will also not match the CMSIS library result.
The DSP block implementation causes an error when there is an overflow in the SRAM buffer on the PIL or hardware.

DSP block	Supported data types	Input requirements	Parameter requirements	Wrapper calling CMSIS functions
Discrete FIR Filter	`single` `fixdt(true,32,31)` `fixdt(true,16,15)` `fixdt(true,8,7)` Note The `Direct Form` structure supports both `single` and fixed-point data types.	Real inputs Real outputs Input and output must be of the same data type. Single/Multi channel.	Filter structure: `Direct Form` Input processing: `Columns as channels (frame based)`. Initial states: `0`. Coefficients source: `Dialog parameters` or `Input port`. For fixed-point Discrete FIR Filter block with `Direct Form Structure`: Rounding mode:`'Floor'`. Saturate on integer overflow: On (check box is selected) or Off (check box is cleared). LockScale: `On`. Fixed-Point Property Settings for Discrete FIR Filter Block Q15-specific: Number of filter coefficients must be even and greater than or equal to 4. If not, pad zeros at the end.	`'Direct Form'` structure: `mw_arm_fir_f32` `mw_arm_fir_init_f32` Fixed-point input with Q7 format: `mw_arm_fir_q7` `mw_arm_fir_init_q7` Fixed-point input with Q15 format: `mw_arm_fir_q15` `mw_arm_fir_init_q15` Fixed-point input with Q31 format: `mw_arm_fir_q31` `mw_arm_fir_init_q31`
FIR Decimation	`single`	Real inputs. Real outputs Single/Multi channel.	Coefficients source: `Dialog parameters`. Filter structure: `Direct Form` Input processing: `Columns as channels (frame-based)`. Rate options: `Enforce single-rate processing`. Allow arbitrary frame length for fixed-size input signals: Clear the parameter.	`mw_arm_fir_decimate_init_f32` `mw_arm_fir_decimate_f32`
FIR Interpolation	`single`	Real inputs. Real outputs Single/Multi channel.	Coefficients source: `Dialog parameters or Input port`. Input processing :`Columns as channels (frame based)`. Rate options: `Enforce single-rate processing`.	`mw_arm_fir_interpolate_init_f32` `mw_arm_fir_interpolate_f32`
LMS Filter	`single`	Real inputs. Real outputs Single/Multi channel.	Specify step size via: `Dialog` (mu specified from the dialog). Reset port:`None`. Output filter weights : `off` (no weights output port). Adapt port : `off` (no adapt output port). Leakage: 1. Initial value of filter weights: `0`. Algorithm: `LMS` or `Normalized LMS`.	`arm_lms_init_f32` `arm_lms_f32` If the algorithm is `Normalized LMS`: `arm_lms_norm_f32` `arm_lms_norm_init_f32`
Biquad Filter	`single` `fixdt(true,32,31)` `fixdt(true,16,15)`	Real inputs. Real outputs Input and output must be of the same data type. Single/Multi channel.	Coefficients source: `Dialog parameters` or `Input port(s)`. Restriction: If Coefficient source is `Input port(s)`, replacement only occurs when Scale value mode is set to `Assume all are unity and optimize`. Filter structure: `Direct Form I` or `Direct Form II transposed`. Initial conditions: `0`. Input processing: `Columns as channels (frame based)`. For fixed-point support for `Direct Form I Structure` for Q15, Q31, and Q15 fast version: Rounding mode:`'Floor'`. Overflow mode: `Wrap` or `Saturate`. Lock data type settings: `On`. Fixed-Point Property Settings for Biquad Filter Block	`Direct Form I` structure: `mw_arm_biquad_cascade_df1_init_f32` `mw_arm_biquad_cascade_df1_f32` `mw_arm_biquad_cascade_df1_init_q15` `mw_arm_biquad_cascade_df1_q15` `mw_arm_biquad_cascade_df1_fast_q15` `mw_arm_biquad_cascade_df1_init_q31` `mw_arm_biquad_cascade_df1_q31` `Direct Form II transposed` structure: `mw_arm_biquad_cascade_df2T_init_f32` `mw_arm_biquad_cascade_df2T_f32`
FFT	`single`	Single/Multi channel. Input length must be equal to FFT length.	FFT implementation: `Radix-2`. Scale result by FFT length: Off (check box is cleared). Inherit FFT length from input dimensions: Off (check box is cleared). FFT length:`16, 64, 256, 1024`	`mw_arm_cfft_init_f32` `mw_arm_cfft_f32`
IFFT	`single`	Single/Multi channel. Input length must be equal to FFT length.	FFT implementation: `Radix-2`. Divide output by FFT length: On (check box is selected). Inherit FFT length from input dimensions: Off (check box is cleared). FFT length:`16, 64, 256, 1024`	`mw_arm_cfft_init_f32` `mw_arm_cfft_f32`
Correlation Convolution	`single`	Real inputs Real outputs Single channel. The two inputs must be the same length.	Computation domain: `Time`.	`arm_conv_f32` `arm_correlate_f32`
Mean RMS Variance Standard deviation	`single`	Non-scalar real inputs Real outputs Single channel (one dimensional). The two inputs must be the same length.	Running statistic : Off (check box is cleared). Enable ROI Processing: Off (check box is cleared). ROI does not apply to RMS. Find statistic over: `entire input`.	`arm_mean_f32` `arm_rms_f32` `arm_var_f32` `arm_std_f32`