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SPI Controller Transfer

Write data to and read data from SPI peripheral devices

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  • SPI Controller Transfer block

Libraries:
Embedded Coder Support Package for STMicroelectronics Discovery Boards / STM32F769I-Discovery
Embedded Coder Support Package for STMicroelectronics Discovery Boards / STM32F746G-Discovery

Description

The SPI controller Transfer block writes data to and reads data from a peripheral devices over the Serial Peripheral Interface (SPI) interface. The block outputs an array of the same size and data type as the input values. You can use this block with Byte Pack and Byte Unpack blocks to support heterogeneous data type transfers.

Using this block, you can access an SPI device to measure quantities such as temperature, pressure.

For more information on SPI communication, see Support SPI Communication.

Ports

Input

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The port accepts the serial data out (SDO) to write to the registers of a peripheral devices over the SPI interface.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

Output

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The port outputs the data read from the registers of a peripheral devices over the SPI interface.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

Parameters

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Main

Specify the SPI module to which the SPI peripheral devices is connected.

Specify the pin name on the board to which the SPI peripheral devices is connected. The SPI controller pulls the SS pin of the selected peripheral devices to a low (0) value to start the communication. The peripheral devices is selected depending on the pin polarity that you specify in the Chip select pin polarity parameter. The controller can select only one peripheral devices at a time.

Select the order in which the data is transmitted.

  • Most significant bit (MSB) — Select MSB to send the most significant bit (MSB) first.

  • Least significant bit (LSB) — Select LSB to send the least significant bit (LSB) first.

An SPI controller sets the clock polarity (CPOL) and the clock phase (CPHA).

The combination of polarity and phase are referred to as SPI modes. The SPI modes 0–3 are shown in the table.

ModeClock Polarity (CPOL)Clock Phase (CPHA)
000
101
210
311

For more information on register read/write, see SPI Transfer Modes.

Advanced

The logic levels supported by Chip select pin to select the SPI peripheral devices.

  • Active low — The device is enabled on logic low. The SPI peripheral devices gets enabled when its SS pin is set to low.

  • Active high — The device is enabled on logic high. The SPI peripheral devices gets enabled when its SS pin is set to high.

Version History

Introduced in R2018a

See Also

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