从 LMS 滤波器算法生成 HDL 和 HLS 代码
R2026b此示例说明如何从实现 LMS(最小均方)自适应滤波器的 MATLAB® 设计生成 HDL 和 HLS 代码。
LMS 滤波器 MATLAB 设计
此示例中使用的 MATLAB 代码实现 LMS 自适应滤波器。在通信和音频处理系统中,LMS 滤波器识别嵌入在噪声中的 FIR 滤波器信号。该滤波器以自适应方式计算最优系数,以最小化输出信号与期望信号之间的差异。
design_name = "mlhdlc_lms_fcn"; testbench_name = "mlhdlc_lms_noise_canceler_tb";
MATLAB 函数 mlhdlc_lms_fcn 接受输入信号和期望信号,然后使用最小均方算法更新滤波器权重。该函数使用辅助函数来计算抽头延迟线、加权输入的树状结构求和以及权重更新。
要查看该函数,请输入:
open(design_name);
LMS 滤波器 MATLAB 测试平台
测试平台文件 mlhdlc_lms_noise_canceler_tb 通过生成受噪声损坏的信号并使用 LMS 滤波器去除噪声来验证 MATLAB 函数的行为。
要查看测试平台,请输入:
open(testbench_name);
对设计进行仿真
要检查运行时错误,请通过运行测试平台对设计进行仿真。在 MATLAB 命令行窗口中,输入:
mlhdlc_lms_noise_canceler_tb;

生成 HDL 代码
使用 coder.config 函数创建一个定点配置对象和一个 HDL 配置对象。将测试平台与这两个配置对象关联。
fixptCfg = coder.config("fixpt"); fixptCfg.TestBenchName = testbench_name; hdlCfg = coder.config("hdl"); hdlCfg.TestBenchName = testbench_name;
指定综合工具、芯片系列、器件名称、包名称和速度值:
hdlCfg.SynthesisTool = "Xilinx Vivado"; hdlCfg.SynthesisToolChipFamily = "Artix7"; hdlCfg.SynthesisToolDeviceName = "xa7a100t"; hdlCfg.SynthesisToolPackageName = "csg324"; hdlCfg.SynthesisToolSpeedValue = "-1I";
生成 HDL 代码:
codegen("-float2fixed", "fixptCfg", "-config", "hdlCfg", design_name, ... "-launchreport");
===================================================
Design Name: <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/mlhdlc_lms_fcn.m')">mlhdlc_lms_fcn</a>
Test Bench Name: <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/mlhdlc_lms_noise_canceler_tb.m')">mlhdlc_lms_noise_canceler_tb</a>
===================================================
Input types not specified for design(s) 'mlhdlc_lms_fcn', inferring types by simulating the first test bench: 'mlhdlc_lms_noise_canceler_tb' in the base workspace.
============= Step1: Analyze Floating-Point Code ==============
Code generation successful.
============= Step1a: Verify Floating-Point Code ==============
### Analyzing the design 'mlhdlc_lms_fcn'
### Analyzing the test bench(es) 'mlhdlc_lms_noise_canceler_tb'
### Begin Floating-Point Simulation (Instrumented)
### Floating-Point Simulation Completed in 4.5114 sec(s)
### Elapsed Time: 5.8112 sec(s)
============= Step2: Propose Types Based on Range Information ==============
============= Step3: Generate Fixed-Point Code ==============
### Generating Fixed-Point MATLAB Code <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/fixpt/mlhdlc_lms_fcn_fixpt.m')">mlhdlc_lms_fcn_fixpt</a> Using Proposed Types
### Generating Fixed-Point MATLAB Design Wrapper <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/fixpt/mlhdlc_lms_fcn_wrapper_fixpt.m')">mlhdlc_lms_fcn_wrapper_fixpt</a>
### Generating Mex file for ' mlhdlc_lms_fcn_wrapper_fixpt '
Code generation successful: <a href="matlab: emlcprivate('emcOpenReport','/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/fixpt/reports/mlhdlc_lms_fcn_wrapper_fixpt_mex/html/report.mldatx');">View report</a>
### Generating Type Proposal Report for 'mlhdlc_lms_fcn' <a href="matlab:web('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/fixpt/mlhdlc_lms_fcn_report.html', '-new')">mlhdlc_lms_fcn_report.html</a>
===================================================
Code generation successful.
### Begin MATLAB to HDL Code Generation...
### Working on DUT: mlhdlc_lms_fcn_fixpt.
### Using TestBench: mlhdlc_lms_noise_canceler_tb.
### Begin VHDL Code Generation
### Working on mlhdlc_lms_fcn_fixpt as <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/hdlsrc/mlhdlc_lms_fcn_fixpt.vhd')">mlhdlc_lms_fcn_fixpt.vhd</a>.
### Generating package file <a href="matlab:edit('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/hdlsrc/mlhdlc_lms_fcn_fixpt_pkg.vhd')">mlhdlc_lms_fcn_fixpt_pkg.vhd</a>.
### Generating Resource Utilization Report <a href="matlab:hdlcoder.report.openDdg('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/hdlsrc/resource_report.html')">resource_report.html</a>.
### Generating Optimization report
### To rerun codegen evaluate the following commands...
---------------------
cgi = load('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/hdlsrc/codegen_info.mat');
cfg = cgi.CodeGenInfo.codegenSettings;
fxpCfg = cgi.CodeGenInfo.fxpCfg;
codegen -float2fixed fxpCfg -config cfg -report
---------------------
### Generating HDL Conformance Report <a href="matlab:web('/tmp/Bdoc26b_3351752_3512615/tp7bd483ff/hdlcoder-ex55898300/codegen/mlhdlc_lms_fcn/hdlsrc/mlhdlc_lms_fcn_fixpt_hdl_conformance_report.html')">mlhdlc_lms_fcn_fixpt_hdl_conformance_report.html</a>.
### HDL Conformance check complete with 0 errors, 2 warnings, and 0 messages.
### Code generation successful: To view the report, open('codegen/mlhdlc_lms_fcn/hdlsrc/html/report.mldatx')


生成 HLS 代码
使用 coder.config 函数创建一个定点配置对象和一个 HLS 配置对象。将测试平台与这两个配置对象关联并启用仿真。
fixptCfg = coder.config("fixpt"); fixptCfg.TestBenchName = testbench_name; hlsCfg = coder.config("hls"); hlsCfg.TestBenchName = testbench_name; hlsCfg.GenerateHLSTestBench = true; hlsCfg.SimulateGeneratedCode = true;
指定综合工具、芯片系列、器件名称、包名称和速度值:
hlsCfg.SynthesisTool = "Xilinx Vitis HLS"; hlsCfg.SynthesisToolChipFamily = "Artix7"; hlsCfg.SynthesisToolDeviceName = "xa7a100t"; hlsCfg.SynthesisToolPackageName = "csg324"; hlsCfg.SynthesisToolSpeedValue = "-1I";
生成 HLS 代码:
codegen("-float2fixed", "fixptCfg", "-config", "hlsCfg", design_name, ...
"-launchreport");