Run TLM Component Testbench
After the TLM component and testbench have been generated, you can verify the generated TLM component using the testbench that was just created:
Open Model Configuration Parameters. Click on TLM Generation.
Select the TLM Testbench pane.
Click Verify TLM Component. The software performs the following actions:
Builds the generated code using make and generated makefiles.
Runs Simulink® to capture input stimulus and expected results.
Converts the Simulink data to TLM vectors.
Runs the standalone SystemC™/TLM testbench executable.
Converts the TLM results back to Simulink data.
Performs a data comparison.
Generates a Figure window for any signals that had data miscompares.
Note
This feature requires the ASIC Testbench for HDL Verifier add-on.
You must generate the component and testbench before you can select Verify TLM Component. See Generate Component and Testbench.