Select TLM Timing Options

This example uses:

ASIC Testbench for HDL Verifier ASIC Testbench for HDL Verifier

Specify timing parameters to approximate the actual time consumed by operations in a real system. These timing values are stored in the TLM component and supplied to the SystemC™ environment when the TLM component is used. Your system simulation environment must perform accounting of execution times in the system, as described in the OSCI TLM-2.0 Language Reference Manual. These values add temporal realism to your system simulations.

For all timing options, specify the desired time in nanoseconds. Each socket has independent timing parameters. The specified timing values are implemented as constants in the generated code. This delay is implemented as a wait() function.

At runtime, you can dynamically control the TLM component via a backdoor interface to enable and disable the return of timing information. See the generated testbench code for details (locate mw_backdoorcfg_IF).

Select TLM Timing Options

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