FMA

Single instruction, multiple data (SIMD) code for fused multiply add operations

Since R2024a

Model Configuration Pane: Code Generation / Optimization

Description

The FMA parameter instructs the code generator to generate single instruction, multiple data (SIMD) code for fused multiply add operations.

To use this parameter, you must set:

Device vendor to ARM Compatible and Device type to ARM Cortex-A (32-bit) or ARM Cortex-A (64-bit).
Leverage target hardware instruction set extensions to a valid instruction set.

off (default) | on

On: Generates single instruction, multiple data (SIMD) code for fused multiply add operations.
Off: Generates non-parallel for loops for fused multiply add operations.

Parameter: InstructionSetFMA

Type: character vector

Value: 'on' | 'off'

Default: 'off'

Introduced in R2024a