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Check Dynamic Range

Check that signal falls inside range of amplitudes that varies from time step to time step

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  • Check Dynamic Range block

Libraries:
Simulink / Model Verification
HDL Coder / Model Verification

Description

The Check Dynamic Range block checks that a signal falls inside a range of values at each time step and executes an assertion after comparison. The width of the range can vary from time step to time step. The u port is the tested input signal. The min and max ports are the lower and upper bounds of the range, respectively. If u is between max and min, the assertion is true (1) and the block does nothing. If not, the block halts the simulation and returns an error message by default.

The input signals can be scalars, vectors, or matrices. All three input signals must be the same data type. The block compares the value of u to the bounds differently depending on the signal.

  • When comparing scalars to vectors or matrices, the block compares the scalar signal to each element of the non-scalar signal.

  • When comparing vectors or matrix signals to other vectors or matrices, the block checks the inputs element-by-element.

  • For models with more than one vector or matrix input signal, the vectors or matrices must have the same dimensions.

Examples

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Open Model

You can check if an input signal falls outside of a dynamic upper and lower bound by using the Check Dynamic Range block.

This model uses a Sine Wave block as a dynamic test signal. The Check Dynamic Range block determines if the value of the sine wave exceeds the signal from the Ramp block or falls below the signal from the Step block at each time step. In the Check Dynamic Range block, the Output assertion signal parameter is selected, so the output signal indicates if the assertion condition is true (1) or false (0). Press Run to observe the model output.

In the Scope block, you can see that the Check Dynamic Range block outputs 0 until the sine wave falls below the value of the Ramp block when the simulation time is 2.47. The block output stays at 1 until the simulation time reaches 3.14, when the sine wave falls below the value of the Step block. The Step block activates when the simulation time reaches 3.5, placing the sine wave between the bounds. The Check Dynamic Range block recognizes this change and outputs 1.

Ports

Input

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Signal specifying the upper bound of the range.

Data Types: half | single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated

Signal specifying the lower bound of the range.

Data Types: half | single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated

Signal checked against the range specified by the max and min ports.

Data Types: half | single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated

Output

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Output signal that is true (1) if the assertion succeeds and false (0) if the assertion fails. If, in the Configuration Parameters window, in the Math and Data Types section, under Advanced parameters, you select Implement logic signals as Boolean data, then the output data type is Boolean. Otherwise, the data type of the signal is double.

Dependencies

To enable this port, select the Output assertion signal parameter.

Data Types: double | Boolean

Parameters

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Clearing this parameter disables the block and causes the model to behave as if the block does not exist. To enable or disable all verification blocks, regardless of the setting of this option, go to the Configuration Parameters window, click Diagnostics > Data Validity, expand the Advanced parameters section, and set Model Verification block enabling to Enable all or Disable all.

Programmatic Use

Parameter: enabled
Type: string scalar or character vector
Values: "on" | "off"
Default: "on"

Specify a MATLAB® expression to evaluate when the assertion fails. Because the expression is evaluated in the MATLAB workspace, define all variables used in the expression in that workspace.

Dependencies

To enable this parameter, select Enable assertion.

Programmatic Use

Parameter: callback
Type: string scalar or character vector
Default: ""

Select this parameter to stop the simulation when the check fails. Clear this parameter to display a warning and continue the simulation.

Programmatic Use

Parameter: stopWhenAssertionFail
Type: string scalar or character vector
Values: "on" | "off"
Default: "on"

Select this parameter to enable the output port.

Programmatic Use

Parameter: export
Type: string scalar or character vector
Values: "on" | "off"
Default: "off"

Specify the style of the block icon. The graphic option displays a graphical representation of the assertion condition on the icon. The text option displays a mathematical expression that represents the assertion condition.

Programmatic Use

Parameter: icon
Type: string scalar or character vector
Values: "graphic" | "text"
Default: "graphic"

Block Characteristics

Data Types

Boolean | double | enumerated | fixed point | half | integer | single

Direct Feedthrough

no

Multidimensional Signals

yes

Variable-Size Signals

no

Zero-Crossing Detection

no

Extended Capabilities

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Version History

Introduced before R2006a

See Also