If you are hand-writing VHDL code, there is no algorithm in MATLAB that will let you program an FPGA. There is an entire class of software collectively known as synthesis tools that exists specifically to convert HDL into a realized design on an FPGA or ASIC. Since you are targeting an FPGA you need to get this software from your FPGA company, such as Xilinx or Altera.
If you are creating VHDL via MathWorks' HDL Coder product, you need to investigate the HDL Workflow Advisor, which is part of HDL Coder. It will walk you through the process of converting a MATLAB design or Simulink model, step-by-step, into a final implementation on an FPGA. The HDL Workflow Advisor still requires a compatible synthesis tool to do the actual synthesis.
