vhdl/verilog simulink

Question

elahe bakhtiari 2011-7-29

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https://ww2.mathworks.cn/matlabcentral/answers/12650-vhdl-verilog-simulink

Is there any way that i import a vhdl/verilog code to a simulink block and use that block as a subsytem?

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Answer 1

Kaustubha Govind 2011-7-29

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Provided that you already have HDL simulator software like ModelSim or Incisive installed, you can use EDA Simulator Link to achieve the interface. The product library comes with a HDL Cosimulation block that you can run as part of a Simulink model.

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Answer 2

Tim McBrayer 2011-7-29

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If you don't have the need to cosimulate with an HDL simulator but wish to incorporate hand-written HDL code with code generated by HDL Coder, you can choose the 'Black Box' architecture for a subsystem, and use your hand-written code as the HDL implementation for that subsystem.

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Sam 2012-1-19

Is any documents to show integrating hand-written HDL code with "Black Box"? I cannot find any tutorials or examples.

Kaustubha Govind 2012-1-20

See http://www.mathworks.com/help/toolbox/slhdlcoder/bso3rab-1.html

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Answer 3

Edward 2011-10-19

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https://ww2.mathworks.cn/matlabcentral/answers/12650-vhdl-verilog-simulink#answer_25156

I've walked through the simple inverter.vhd tutorial using the EDA Link to cosimulate with modelsim:

http://www.mathworks.com/help/releases/R2010a/toolbox/edalink/ug/bsctzv_-63.html#bsctzv_-66

I have MATALB R2010a

I am very frustrated because none of the vsim or vsimulink commands work. They just give errors even though I am following the simulation step by step.

I seem to have difficulty getting Modelsim to commiunicate information to MATLAB through the socket interface.