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Cannot connect to model 'time_simulink'; please try Update Diagram (Ctrl-D). Caused by: Error in 'time_simu​link/Upsam​ple': All sample times for this block must be discrete. C

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Fayaz
Fayaz 2023-6-17
评论： Fayaz 2023-7-7
Cannot connect to model 'time_simulink'; please try Update Diagram (Ctrl-D).
Caused by:
  • Error in 'time_simulink/Upsample': All sample times for this block must be discrete. Continuous sample time is not allowed.
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Daniel
Daniel 2023-6-17
You're trying to upsample a continuous input. The input has to have a discrete sample time before it can be upsampled. The sample time is the period (in simulated time) between updates to the signal. E.g. a sample time of 0.2 would mean that the signal value changes at time 0, 0.2, 0.4, etc.
If the input to your upsample block is an inport, you can set a sample time under the Execution tab.
If the input to your upsample block is a constant, you can set a sample time under the Main tab.
If the input to your upsample block comes from other signals within the system, you can use a Zero-Order Hold (from the Simulink/Discrete library, among other places) to make the output have a discrete sample time.
If you post your full model or more context, we will be able to provide a more targeted suggestion. For instance, what kind of signal is going into the Upsample block? Where does it come from? What are you intending to accomplish? Is the system intended for code generation?
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