Hi Eirik,
Okay, I think I understand now what you need. First, you only have 27 bits data not 29. Therefore, you want to map the 27 bits from 43 downto 16 (15, 14, and 13 downto 0 would be 0). I found a solution which HDL Coder understands good enough. See the model with comments below:
The Data Type Conversion and 0-Constant block use Inherit via Back Propagation. The 1-Constant block is set to unsigned, no fraction. First step is the conversion from signed with fraction to unsigned without fraction (all bits stay the same - Stored Integer). The important thing here -> no hardware will be required for all the data type calculations as long as the signals involved are only converted and concatenated. Even the MATLAB Function block only outputs a prototype which is not used directly. Here the code:
function diff_prototype = fcn(reference, data)
persistent diff_prototype_temp
if isempty(diff_prototype_temp)
if isfi(reference) && isfi(data)
diff_prototype_temp = fi(0,0,reference.WordLength-data.WordLength,0);
else
warning('The two inputs should be fixed-point.')
diff_prototype_temp = fi(0,0,1,0);
end
end
diff_prototype = diff_prototype_temp;
I did not make it 100% safe. For simulation it only runs at initialization and later just copies the prototype. Would be nice if the Data Type Propagation block would have a subtraction rule for 1.4.1. So I required this work around.
The generated VHDL:
Note: The reference here was an input. It could be a constant with the right data type or just a parameter for the MATLAB Function block. You can make the Area a Subsystem, mask it, and add it to a custom library.
Best regards,
Tom
