Hello,
The parameters you configured appear to be correct. However, since I don't have access to the hardware, I am unable to determine why the PWM module is behaving unpredictably. I can suggest an alternative solution to address this issue.
To achieve the desired outcome, consider using the "TZFRC" (force a trip event) and "TZCLR" (clear trip event) registers of the F28388D microcontroller. By setting the bit EPwm1Regs.TZFRC.bit.OST to logic "1", you can trigger a one-shot event on the PWM1 module, which will disable the PWM for both the top and bottom switches (EPWM1a and EPWM1b). Similarly, setting the bit EPwm1Regs.TZCLR.bit.OST to "1" will clear the trip flag, re-enabling the PWM.
The same approach applies to the PWM2, PWM3, and PWM4 modules. For example, writing "1" to the bit EPwm2Regs.TZFRC.bit.OST will trigger a one-shot event on the PWM2 module, disabling the pulses for EPWM2a and EPWM2b.
In Simulink, you can manually write to these registers using the "Register ReadWrite" block. You can find more information on this in the MATLAB documentation linked here: https://www.mathworks.com/help/ti-c2000/ref/epwmtype14.html
In this way, you can avoid configuring any continuous software forcing logic.
Suggested Approach:
Create the following model in Simulink.
The detailed explanation for “PWM1 control logic block” is given below. Follow the same for other two “control logic block” also.
(NOTE: here, two “Register ReadWrite” blocks are used. One of it is named as “write TZFRC register” and other is named as “write TZCLR register”)
- Open the “block parameters” for “write TZFRC register” block, as shown below.
- Fill all the “unspecified” fields appropriately to get the register bit : “EPwm1Regs.TZFRC.bit.OST”. (NOTE: If the parameters on the block are 'Unspecified', configure the hardware setup using 'c2000setup' command.)
- Now open the “block parameters” for “write TZCLR register” block.
- Again, fill all the “unspecified” fields appropriately to get the register bit : “EPwm1Regs.TZCLR.bit.OST”.
- Working logic:
- When the above system receives the logic “1” from the stateflow algorithm, “Write TZFRC register” block writes “1” to the “EPwm1Regs.TZFRC.bit.OST” register bit fields. This forces a one shot event on PWM 1 module and stop the pulses .
- When the above system receives the logic “0” from the stateflow algorithm, “Write TZCLR register” block writes “1” to the “EPwm1Regs.TZCLR.bit.OST” register bit fields. This clears the trip flag and enables the PWM pulses.
I hope this is as per your expectation!
