ENCOUNTER ERROR while using the FPGA system_top.tcl

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Hi,
I want to learn the reference design from the official given example: Deep Learning Processor IP Core Generation for Custom Board.
However, when I want to create a block design using the given tcl script: system.txt (The tcl file can not be uploaded here, so I change the
expand name).
Many errors occurs:
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /ilmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /second_ilmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /dlmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /second_dlmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /iomodule_0/SLMB/Reg'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /iomodule_0/SLMB/IO'
create_bd_cell: Time (s): cpu = 00:00:14 ; elapsed = 00:00:15 . Memory (MB): peak = 3476.746 ; gain = 7.336
ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [IP_Flow 19-3477] Update of parameter 'PARAM_VALUE.C0.DDR4_CASLATENCY' failed for IP 'ddr4_0'. ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [IP_Flow 19-3477] Update of parameter 'PARAM_VALUE.C0.DDR4_CASWRITELATENCY' failed for IP 'ddr4_0'. ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [IP_Flow 19-3477] Update of parameter 'PARAM_VALUE.C0.DDR4_CASLATENCY' failed for IP 'ddr4_0'. ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /ilmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /second_ilmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /dlmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /second_dlmb_cntlr/SLMB/Mem'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /iomodule_0/SLMB/Reg'
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_object /iomodule_0/SLMB/IO'
ERROR: [IP_Flow 19-3477] Update of parameter 'PARAM_VALUE.C0.DDR4_CASLATENCY' failed for IP 'ddr4_0'. ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [IP_Flow 19-3477] Update of parameter 'PARAM_VALUE.C0.DDR4_CASWRITELATENCY' failed for IP 'ddr4_0'. ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [IP_Flow 19-3461] Value 'ddr4_sdram' is out of the range for parameter 'C0 DDR4 BOARD INTERFACE(C0_DDR4_BOARD_INTERFACE)' for BD Cell 'ddr4_0' . Valid values are - Custom, ddr4_sdram_062, ddr4_sdram_DR
INFO: [IP_Flow 19-3438] Customization errors found on 'ddr4_0'. Restoring to previous valid configuration.
INFO: [Common 17-17] undo 'set_property'
ERROR: [Common 17-39] 'set_property' failed due to earlier errors.
while executing
"rdi::add_properties -dict {CONFIG.C0.BANK_GROUP_WIDTH 1 CONFIG.C0.DDR4_AxiAddressWidth 31 CONFIG.C0.DDR4_AxiDataWidth 512 CONFIG.C0.DDR4_DataWidth 64 ..."
invoked from within
"set_property -dict [ list CONFIG.C0.BANK_GROUP_WIDTH {1} CONFIG.C0.DDR4_AxiAddressWidth {31} CONFIG.C0.DDR4_AxiDataWidth {512} CONFIG.C0.DDR4_Data..."
(procedure "create_root_design" line 51)
invoked from within
"create_root_design """
(file "C:/ProgramData/MATLAB/SupportPackages/R2024b/toolbox/dnnfpga/supportpackages/xilinx/board/boards/+DLKCU105/+matlab_libiio_3axi4_master_2020_1/system_t..." line 387)
The Matlab version is R2024b, and the Vivado Version is 2023.1. Does the software version conflict? Or can you provide new TCL consoles?

采纳的回答

KH
KH 2024-12-25
I found the dame solution,
The problem is caused by this segment: The setup of the DDR4:
# Create instance: ddr4_0, and set properties
set ddr4_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:ddr4:2.2 ddr4_0 ]
set_property -dict [ list \
CONFIG.C0.BANK_GROUP_WIDTH {1} \
CONFIG.C0.DDR4_AxiAddressWidth {31} \
CONFIG.C0.DDR4_AxiDataWidth {512} \
CONFIG.C0.DDR4_DataWidth {64} \
CONFIG.C0.DDR4_InputClockPeriod {3332} \
CONFIG.C0.DDR4_MemoryPart {EDY4016AABG-DR-F} \
CONFIG.C0_CLOCK_BOARD_INTERFACE {default_sysclk_300} \
CONFIG.C0_DDR4_BOARD_INTERFACE {ddr4_sdram} \
CONFIG.Debug_Signal {Disable} \
CONFIG.RESET_BOARD_INTERFACE {reset} \
] $ddr4_0
I checked the ipcore setting in vivada 2023,
The IP interface for DDR4 has no choice for ddr4_sdram, Changing this line can solve the problem,
I do not have this evaluation board, so I do not precisely which should be chosen, I chose the ddr4_sdram_DR,
CONFIG.C0_DDR4_BOARD_INTERFACE {ddr4_sdram_DR} \
It worked.

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