SiC MOSFET Parameterization Using Simulation Results from SPICE(LTspice)
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I would like to switch the SPICE tool to LTspice. I am attempting to parameterize a SiC MOSFET using the function ee.spice.semiconductorSubcircuit2lookup. I have updated the SPICE tool settings to LTspice and ensured that the engine path is correctly configured. While runing the script its look like LTspice is running and generating . net, .log , .raw and .op.raw file. However, I am still encountering the following error. For the refernce here i am attaching my code.
Error using ee.internal.spice.lookuptable.subcircuitGeneratelookup/runSPICE
SIMetrix simulation error. Run a standalone SIMetrix simulation using netlist
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs5.net
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs15.net
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs17.net and debug.
Error in ee.internal.spice.lookuptable.subcircuitGeneratelookup/getLookupTable
Error in ee.internal.spice.lookuptable.semiconductorSubcircuit2lookup
Error in ee.spice.semiconductorSubcircuit2lookup
Error in SiCMOSFETFromSPICEResultsExample (line 62)
ee.spice.semiconductorSubcircuit2lookup(subcircuitFile, ...
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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回答(1 个)
Yifan Yang
2025-7-2
Hi Gaurav,
I think here it is a typo, it should be:
'LTspice simulation error. Run a standalone LTspice simulation using netlist:
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs5.net
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs15.net
C:\Users\prajapg\Documents\MATLAB\Examples\R2024b\simscapeelectrical\SiCMOSFETFromSPICEResultsExample\IMBG120R045M1\IMBG120R045M1H_L3_Capacitance_Vgs17.net and debug.'
LTspice fails to run these netlist test harnesses, likely due to convergence issues. The recommended approach is to first test the circuit as a standalone netlist in LTspice. You may need to adjust simulation parameters like gmin, abstol, and reltol to improve LTspice's convergence behavior.
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