How to avoid C2802x COMP simulink module output as single(float) format?

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Ashish Kumar Gupta
评论： Ashish Kumar Gupta 2016-1-7
I used simulink module C2802x COMP(arator) module with settings as: Computer Module = Comparator 1, Second input = Internal DAC, Internal DAC Value = 100, Syncronozation = synchronous, Qualification Period = Passed through
I have observed that simulink is generating the code as below, which is effectively converting it to float and so consuming almost 140 cycles for no reason. So, can you please tell me how to avoid this float conversion?
TEST_PROJ_DW.COMP = Comp1Regs.COMPSTS.bit.COMPSTS;
rtb_LogicalOperator = (TEST_PROJ_DW.COMP != 0.0F);

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回答（1 个）

ashish ahir
ashish ahir 2016-1-6
can you upload screenshot of this setting parameters?

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