HDL Coder shows conformance error due to divide and fi function calls

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Shruthi Sampathkumar
评论： Walter Roberson 2016-3-1
My Matlab code has divide functions such as:
q=(round(b*conj(k1)))/b;
In the fixed_point file generated, the above code is rewritten using functions such as 'divide' and 'fi' as shown:
q=fi(fi_div((round(b*conj(k1))), b), 1, 14, 13, fm);
and the Verilog code is not getting generated.
The following error is displayed:
1. Found an unsupported unbounded loop structure, at . This loop may be user written or automatically generated due to the use of specific vector expressions or functions. For more information on unsupported loop structures, please refer to the documentation.
2. Function calls requiring attention
LATT_IMPL_CFBLMS_FUNCTION_fixpt
divide
fi

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