I typically follow your second suggestion. I used enabled subsystems to split up the computations into blocks that can either be done in a single clock cycle (like addition, logic, etc.) or that require a predictable number of pipeline registers (e.g. multiplication). In this way, I can manage the results of the delay balancing feature (which I really dislike, but that's another discussion).
A typical subsystem looks like this:
You can see the "input valid" to "output valid" line in the top and the data line directly below it.
As you can see, I'm generous with unit delays, so I can predict better where the delay balancing will insert delays. In later stages, if I run into performance issues, I can optimize a bunch of them away, but typically it's not necessary in my applications.
