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"Abnormal exit: Downstream Integration: Unable to locate twr file"

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shankar
shankar 2012-5-14
when i am trying to generate verilog hdl code for a model containg state flow chart showing error at the stage of "Annotate Model with Synthesis Results" in hdl work flow advisor.pls help me how to resolve this error

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Tim McBrayer
Tim McBrayer 2012-5-14
The twr file is a timing file that is generated by the Xilinx tools. Can you find the tool in the Xilinx project directory underneath the HDL Coder project directory?

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