Error while compiling simulink model?

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Rik Bakker
Rik Bakker 2019-2-21
回答： Christian Günther 2021-3-19
Dear reader,
When compiling my model in simulink i got the next error:
'Block '...' requires that the signal elements entering its input port 1 occupy contiguous areas of memory. Consider using a Signal Conversion block to create a contiguous segment of memory to sotre a copy of an input signal. Note, however, that the Signal Conversion block cannot be placed at the root level since the model has been setup to export functions. Alternatively, consider modifying the block '...' to accept multiple contiguous input signals if possible. This message is related to a hidden ToAsyncQueueBlock block. Consider manually inserting such a block to debug the problem.'
I have no idea what to do...
Simulink is able to build the model completely, only while compiling i got this error.
Hopefully someone can give me some tips.
Kind regards,
Rik Bakker
Error_simulink.PNG

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回答（2 个）

Christian Günther
Christian Günther 2021-3-19
Hello Rik,
I had a similar problem with a hidden ToAsyncQueueBlock.
This was caused by the Simulation Data Inspector.
Stop streaming the signal to Simulation Data Inspector.
Best regards
Christian Günther
amoha
amoha 2019-6-26
Hey, did you find ou the solution to this issue? I have the similar problem.

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