Hi, it looks like you have one or more block generate a double data type and it propogates and spreads to entire model. Try to break somewhere and use ctrl+D to check the correctness of data type.
Hdl Coder Block Compatibility Error
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Hi,
I have a Problem with my HDL Coder.
I have a simple PI Controller which should control a PWM Generation. This Model should be implemented on an FPGA. Unfortunately the Conversion with the HDL Coder failed. I used the HDL Workflow Advisor but everytime I tried it the Block Compatibility Check fails.
Before the Conversion the Fixed Step Tool converted the Datatypes to Fixed Point Format. In the Block Schematic the Datatypes are shown but after I run the Block Compatibility Check the Error "Signals of Type Double will not generate synthesizable HDL..." occurs and in the Schematic all Datatypes have changed to double.
I don't know why the Datatypes change from the Fixed Point to Double.
The Conversion of Logical and other Mathematical Block Diagrams is not a Problem and HDL code werde synthesized.
Only with the Controller Model there are errors.
I would be really glad if someone can help me to fix this problem.
Regards,
Mario
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