Variable Fractional Delay block takes positive delay sample, if I have negative delay sample , how it can be used.

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For signal advance operation ie when the fractional sample value is negative it should give last samples may be zero in advance case. Please tell.
How to use vfd clock for advance case. My input is
fs=16*10^3;%sampling frequency
N=320;
T=N/fs;
timeList = 0:(1/fs):(T-1/fs);
x=sin(2 *pi * f1 * timeList);
delay_samples=-18.2;

回答(1 个)

Walter Roberson
Walter Roberson 2020-9-16
Negative delay samples requires time travel unless the information about the wavefront is known in advance.
This is a fundamental finding of Einstein's Theory of Relativity and cannot be bypassed.
The most you can do is to create two paths for the information about the event to travel, with the "regular" path having a positive delay relative to the "fast" path. For example you could put gravitational masses in the path to bend the path of the "regular" signal so that it gets delayed relative to a path without gravitational masses. In practice you would probably instead introduce a dialectric into an electrical path, https://en.wikipedia.org/wiki/Speed_of_electricity or introduce a transparent solid into an optical path.
... Unless, that is, you already know the shape of what is to be received, in which case you could run your clock earlier.
  4 个评论
Rashi Mehrotra
Rashi Mehrotra 2020-9-17
Here I am shifting my sin signal , in signal processing it can be advanced or delayed depending on the condition. If my signal is x(t), delaying means x(t-D) and advance means x(t+D).
Thanks
Walter Roberson
Walter Roberson 2020-9-17
Then build a new sine wave that has the required characteristics.
You can use a Math Block on your Clock signal to calculate an earlier or later time, and feed that altered time to the sine wave function block.

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