HDL Coder Generic parameters
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Good morning, I have a single doubt about generics. I continue the next steps to achieve that the HDL Coder generates generic parameter.
- Set "Generate parameterized HDL code from masked subsystem" active in the configuration
- Set the subsystem like atomic
- Create a mask
- Generate a Simulink Parameter in the base workspace
myParam = Simulink.Parameter;
myParam.CoderInfo.StorageClass = 'ExportedGlobal';
myParam.Value = 2;
myParam.Min = 1;
myParam.Max = 3;
myParam.DataType = 'uint32';
myParam.CoderInfo.Identifier = 'D_SENSING_DSP_MIDDLE_TS';
Finally I set the myParam in the Mask value.
With this 5 steps I get the generic parameter (Ander) like you can see in the file:
ARCHITECTURE rtl OF invInverterModulations IS
340
341 -- Component Declarations
342 COMPONENT invSubsystem
343 GENERIC( Ander : integer
344 );
345 PORT( clk : IN std_logic;
346 Clk_resetx : IN std_logic;
347 enb : IN std_logic;
348 dsp_control : IN std_logic_vector(31 DOWNTO 0); --
But the problem is that then the HDL Coder set the value of myParam.Value to the Generic Parameter:
BEGIN
427 u_Subsystem : invSubsystem
428 GENERIC MAP( Ander => 2
429 )
430 PORT MAP( clk => clk,
431 Clk_resetx => Clk_resetx,
432 enb => clk_enable,
433 dsp_control => DspControl, -- uint32
434 dsp_half_period => DspHalf_Period, -- uint32
435 dsp_dx => DspDx, -- uint32
436 dsp_dy => DspDy, -- uint32
My idea is to set the Value of Ander outside of this code, because this is a component that we want to use with different Ander values and we want to avoid the code generation for each Ander values. Is this possible? Or it is imposible to generate code depending in the identifier? I know that this is possible in embedded coder but in HDL coder?
I atach the Top Level file.
Thank you
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采纳的回答
Shomit Dutta
2021-3-16
If you want to adjust model behavior using tunable parameters during HDL simulation, please check the usage described in the following page:
Hope, the above meet your requirements. Generics are useful for resuability when you have multiple instantitations of an atomic subystem inside a DUT and HDL Coder generates single resuable HDL module or entity.
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Shomit Dutta
2021-3-19
If you are using "Generate parameterized HDL code from masked subsystem" option, please note that the HDL code has to be bit true to the original Simulink model for verification usecases. As per design, the generic parameter can be supported only for subsystems inside DUT and not at the top DUT subsystem.
You can manually modify the generic values if it is verifying the functionality different than the original Simulink model.
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