MathWorks HDL Coder Team

MathWorks

Last seen: 1 month 前 | 自 2020 起处于活动状态

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HDL Coder Support Package for Intel FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Intel FPGA and SoC devices

3 months 前 | 19 次下载 |

已提交

HDL Coder Support Package for Xilinx FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Xilinx FPGA and SoC devices

3 months 前 | 75 次下载 |

已提交

HDL Coder Self-Guided Tutorial
Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.

6 months 前 | 106 次下载 |

已提交

HDL Coder Evaluation Reference Guide
Getting started guide for learning and evaluating HDL Coder

12 months 前 | 40 次下载 |

已提交

HDL Coder Support Package for Xilinx RFSoC Devices
Generate code for the FPGA portion of RFSoC devices

1 year 前 | 6 次下载 |

已提交

Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware
Design and prototype vision systems using Xilinx Zynq-based hardware

1 year 前 | 18 次下载 |

已提交

HDL Coder Support Package for Xilinx FPGA Boards
Generate and deploy HDL code for Xilinx development boards

1 year 前 | 20 次下载 |

已提交

HDL Coder Support Package for Intel FPGA Boards
Generate and deploy HDL code for Altera development boards

1 year 前 | 4 次下载 |

已提交

HDL Coder Support Package for Microchip FPGA and SoC Devices
Generate code for Microchip FPGAs and the FPGA portion of SoC Devices

3 years 前 | 2 次下载 |

已回答
HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Refer to the following External Bug Report for a resolution to this issue: https://www.mathworks.com/support/bugreports/2656440...

3 years 前 | 5

| 已接受

提问

HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Since returning to the office in 2022, I have been unable to use HDL Workflow Advisor with Xilinx Vivado. I see the following er...

3 years 前 | 2 个回答 | 5

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个回答

已回答
Generate C code for HLS?
While HLS does take C/C++ as an input, it typically requires some amount of hardware specification to successfully generate HDL....

4 years 前 | 0

| 已接受

提问

Generate C code for HLS?
Can I generate C code from MATLAB and Simulink and then feed it into a high-level synthesis (HLS) tool to generate HDL?

4 years 前 | 2 个回答 | 0

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已回答
Does HDL Coder support the VHDL fixed-point and floating-point packages?
No. To ensure full portability and numerical consistency with MATLAB rounding and saturation, HDL Coder generates this functiona...

4 years 前 | 0

| 已接受

提问

Does HDL Coder support the VHDL fixed-point and floating-point packages?
Does the VHDL code generated by HDL Coder use the IEEE VHDL fixed-point or floating-point packages (IEEE.fixed_pkg.all, IEEE.flo...

4 years 前 | 1 个回答 | 0

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