软硬件协同设计
使用 Communications Toolbox™ Support Package for USRP Embedded Series Radio，您可以在 Simulink® 中设计 SDR 算法，然后在 USRP 嵌入式系列无线电上对您的设计进行原型构建。您可以部署在 ARM® 处理器和基础 Zynq® 片上系统 (SoC) 的 FPGA 结构之间分区的软硬件 (HW/SW) 协同设计实现，或仅针对以 FPGA 结构为目标的设计进行原型构建。此工作流仅在 Simulink 中可用。
函数
sdrdev | Create radio object for interfacing with USRP embedded series radio hardware |
模块
| E3xx Receiver | Receive data from USRP E3xx radio hardware |
| E3xx Transmitter | Send data to USRP E3xx radio hardware |
主题
- Hardware-Software Co-Design Overview
Learn the basics of the hardware-software co-design feature in this support package and its software requirements.
- Installation for Hardware-Software Co-Design
Install and configure additional support packages and third-party tools required by hardware-software co-design workflow.
- Hardware-Software Co-Design Workflow
Deploy partitioned hardware-software co-design implementations for SDR algorithms.
- Guidelines for Configuring the Software Interface Model
Configure your model for continuous and packet-based transmission and reception.
- System Timing
Explore ARM processor scheduler options for the software interface model.
- FPGA Targeting Workflow
Prototype SDR algorithms on the FPGA fabric only.
疑难解答
Troubleshooting Hardware-Software Co-Design
Resolve issues encountered while using the hardware-software co-design workflow.
精选示例
HW/SW Co-Design with AXI4-Stream Using USRP E3xx
Deploy a hardware-software co-design implementation of a waveform transmitter and receiver using AXI4-Stream.
Target QPSK Transmitter and Receiver to USRP E3xx Using HW/SW Co-Design Workflow
Implement QPSK transmitter and receiver algorithm partitioned across the ARM and the FPGA fabric.
Target ADS-B Airplane Tracker Using USRP E3xx and HW/SW Co-Design Workflow
Partition ADS-B receive functionality across the ARM and the FPGA fabric.
