saveBitstreamInfoFile

Class: dlhdl.Bitstream
Namespace: dlhdl

Update bitstream MAT file with information from bitstream object

Since R2024b

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Syntax

saveBitstreamInfoFile(bitstreamObject)

Description

saveBitstreamInfoFile(bitstreamObject) overwrites a MAT file using information from the specified bitstream.

example

Input Arguments

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Bitstream information, specified as a dlhdl.Bitstream object.

Examples

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Create a generic deep learning processor configuration object. To generate the bitstream faster, turn off the conv and fc modules. Save the object in the variable hPC.

hPC = dlhdl.ProcessorConfig;
hPC.TargetPlatform  = 'Generic Deep Learning Processor';
hPC.SynthesisTool = '';
hPC.setModuleProperty("conv",ModuleGeneration="off");
hPC.setModuleProperty("fc",ModuleGeneration="off");

Generate a deep learning processor IP core. Name the processor myProcessor and save it in the folder myProject.

dlhdl.buildProcessor(hPC,ProjectFolder='myProject', ...
ProcessorName="myProcessor");

Create a bitstream object using the information from the deep learning processor MAT file myProcessor.mat.

path = fullfile("myProject","myProcessor.mat");
hB = dlhdl.Bitstream(path)
hB = 
  Bitstream with properties:

                     Name: ''
                     Path: 'myProcessor.mat'
        MemoryBaseAddress: '0'
       MemoryAddressRange: '0'
     ProcessorBaseAddress: '0'
    ProcessorAddressRange: '0x10000'

Display the myProcessor.mat file information.

bitstreamPath = fullfile("myProject","myProcessor.mat");
bitstream = load(bitstreamPath,"BitstreamBuildInfo");
bitstream.BitstreamBuildInfo
ans = 
  BitstreamBuildInfo with properties:

        ProcessorConfig: [1×1 dnnfpga.config.CNN5ProcessorConfig]
             VendorName: ''
              BoardName: ''
    ReferenceDesignName: ''
              Frequency: 200

Use information from the board and reference design plugin files to update the dlhdl.Bitstream object.

boardPlugin = DLZCU102.plugin_board;
refDesign = DLZCU102.DLRefDesign_BRAM.plugin_rd;
loadInfoFromPlugin(hB,boardPlugin=boardPlugin,refDesignPlugin=refDesign);
hB
hB = 
  Bitstream with properties:

                     Name: ''
                     Path: 'myProcessor.mat'
        MemoryBaseAddress: 'C0000000'
       MemoryAddressRange: '200000'
     ProcessorBaseAddress: 'A0000000'
    ProcessorAddressRange: '0x10000'

Update the myProcessor.mat file by using the saveBistreamInfoFile method.

saveBitstreamInfoFile(hB)
bitstreamPath = fullfile("myProject","myProcessor.mat");
bitstream = load(bitstreamPath,"BitstreamBuildInfo");
bitstream.BitstreamBuildInfo
ans = 
  BitstreamBuildInfo with properties:

        ProcessorConfig: [1×1 dnnfpga.config.CNN5ProcessorConfig]
             VendorName: 'Xilinx'
              BoardName: 'Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit'
    ReferenceDesignName: 'DL Reference Design With BRAM Access'
              Frequency: 200

Version History

Introduced in R2024b

See Also

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