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Upsampler

Upsample by adding zeros between input samples

Since R2022b

  • Upsampler block

Libraries:
DSP HDL Toolbox / Signal Operations

Description

The Upsampler block upsamples an input signal by adding L–1 zeros between input samples, where L is the upsampling factor. The block supports these combinations of input and output data.­­­

  • Scalar input and scalar output

  • Scalar input and vector output

  • Vector input and vector output

The block provides an architecture suitable for HDL code generation and hardware deployment.

Note

You can also generate HDL code for this hardware-optimized algorithm, without creating a Simulink® model, by using the DSP HDL IP Designer app. The app provides the same interface and configuration options as the Simulink block.

Examples

Ports

Input

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Input data, specified as a scalar or a column vector with a length up to 64. The input data must be an integer or a fixed-point value with a word length less than or equal to 128.

The double and single data types are supported for simulation, but not for HDL code generation.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point

Control signal that indicates whether the input data is valid. When this value is 1, the block accepts the values on the data input port. When this value is 0, the block ignores the values on the data input port.

Data Types: Boolean

Control signal that clears the internal states. When this value is 1, the block stops the current calculation and clears its internal states. When this value is 0 and valid is 1, the block captures data for processing.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Dependencies

To enable this port, on the Control Ports tab, select the Enable reset input port parameter.

Data Types: Boolean

Output

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Upsampled data, returned as a scalar or a column vector with a length up to 1 to 128.

Data Types: single | double | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | fixed point

Control signal that indicates whether data from the data output port is valid. When this value is 1, the block returns valid data on the data output port. When this value is 0, the values on the data output port are not valid.

Data Types: Boolean

Control signal that indicates whether the block is ready for new input data on the next cycle. When this value is 1, you can specify the data and valid inputs for the next time step. When this value is 0, the block ignores any input data in the next time step.

Dependencies

To enable this port, on the Control Ports tab, select the Enable ready output port parameter.

Data Types: Boolean

Parameters

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Main

Specify the upsampling factor by which the block increases the input sampling rate.

Specify the sample offset as an integer in the range [0, Upsample factor (L) – 1].

Specify the minimum number of cycles between the valid input samples as a factor or multiple of Upsample factor (L) or an integer in the range [1, Inf] based on the type of input and output data.

Input DataOutput DataMinimum Number of Cycles Between Valid Input Samples
ScalarScalarGreater than or equal to Upsample factor (L)
ScalarVectorFactor of Upsample factor (L)
VectorVectorInteger in the range [1, Inf]

Control Ports

Select this parameter to enable the reset input port. The reset signal implements a local synchronous reset of the data path registers.

For more reset considerations, see Tips.

Select this parameter to enable the ready output port. This port indicates whether the block is ready for new input data.

Algorithms

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Extended Capabilities

Version History

Introduced in R2022b