针对 HVX 的代码优化
R2026b使用代码替换,从模块、System object 和数学运算符生成针对数字信号处理的优化代码。
Qualcomm® Hexagon® 处理器需要满足特定条件才允许对适用于向量处理器的 Hexagon Vector eXtension (HVX) 使用代码替换。当从模型中生成 C/C++ 代码时,您可以使用以下代码替换。
模块
| HVX Conv2D | 2-D convolution for HVX (自 R2026a 起) | |
| HVX Dilate | 2-D grayscale dilation for HVX (自 R2026a 起) | |
| HVX Erode | 2-D grayscale erosion for HVX (自 R2026a 起) | |
| HVX FFT2 | 2-D fast Fourier transform using HVX (自 R2026b 起) | |
| HVX IFFT2 | 2-D inverse fast Fourier transform using HVX (自 R2026b 起) |
对象
hexagon.hvx.FFT2 | 2-D fast Fourier transform using HVX (自 R2026b 起) |
hexagon.hvx.IFFT2 | 2-D inverse fast Fourier transform using HVX (自 R2026b 起) |
函数
hexagon.hvx.conv2d | 2-D convolution for HVX (自 R2026a 起) |
hexagon.hvx.dilate3x3 | 2-D grayscale dilation with a 3-by-3 square structuring element for HVX (自 R2026a 起) |
hexagon.hvx.dilate5x5 | 2-D grayscale dilation with a 5-by-5 square structuring element for HVX (自 R2026a 起) |
hexagon.hvx.dilate7x7 | 2-D grayscale dilation with a 7-by-7 square structuring element for HVX (自 R2026a 起) |
hexagon.hvx.erode3x3 | 2-D grayscale erosion with a 3-by-3 square structuring element for HVX (自 R2026a 起) |
hexagon.hvx.erode5x5 | 2-D grayscale erosion with a 5-by-5 square structuring element for HVX (自 R2026a 起) |
hexagon.hvx.erode7x7 | 2-D grayscale erosion with a 7-by-7 square structuring element for HVX (自 R2026a 起) |
主题
- Conditions for Code Replacement of DSP Blocks with HVX
Specify conditions for DSP blocks to allow code replacement with the Hexagon Vector Extension.
- Conditions for Code Replacement of DSP System Objects with HVX
Specify conditions for DSP System objects to allow code replacement with the Hexagon Vector Extension.
- Conditions for Code Replacement of MATLAB Functions with HVX
Specify conditions for MATLAB functions to allow code replacement with the Qualcomm Hexagon Vector eXtension library (HVX).
- Conditions for Code Replacement of Math Operators with HVX
Specific CRL conditions for math operators to allow code replacement with the Hexagon Vector Extension.
- Generate SIMD Code using Hexagon and HVX Instruction Set for Qualcomm Hexagon Processors
Learn how to generate SIMD code from MATLAB® functions using Hexagon and HVX instruction set for Qualcomm Hexagon processors. (自 R2026a 起)
