HLS 算法设计
R2026b支持的 MATLAB® 语法和函数以及最佳做法
使用 MATLAB 算法生成可高效部署在硬件上的高级综合代码 (HLS)。请务必使用硬件建模最佳做法，并且仅使用受支持的 MATLAB 语法和函数。
本页提供支持高级综合代码生成的 MATLAB 函数和语言语法。如果 MATLAB 算法使用不受支持的函数，您可通过用查找表逼近替换该函数来生成代码。请参阅Replace a Function with a Lookup Table from the Command Line。
您可以编写 MATLAB 代码来进行状态机建模，并实现计数器、RAM 等硬件元素以生成高级综合 (HLS) 代码。在编写代码时，遵循 for 循环最佳做法和规范以编写高效的 MATLAB 代码来生成 HLS 代码。
主题
支持的 MATLAB 函数和数据类型
- 支持 HDL 和 HLS 代码生成的函数
支持 HDL 和高级综合 (HLS) 代码生成的内置 MATLAB 和工具箱函数。 - MATLAB Language Features Supported for HLS Code Generation
You can generate HLS code from MATLAB code using the HDL Coder™ Workflow Advisor. - Supported MATLAB Data Types, Operators, and Control Flow Statements
Supported data types, operators, and control flow statements for HDL and High-Level Synthesis (HLS) code generation. - Bitwise Operations in MATLAB for HDL and HLS Code Generation
HDL Coder supports bit shift, bit rotate, bit slice operations that mimic HDL-specific operators without saturation and rounding logic. - Support MATLAB Math Functions for Xilinx Vitis HLS (SoC Blockset)
Support mathematical functions with floating-point types for AMD® Vitis® HLS. (自 R2026a 起)
最佳做法
- 编写 MATLAB 代码以生成高效 HDL 和 HLS 代码的规范
编写高效 MATLAB 代码的规范以及高效 HDL 和高级综合 (HLS) 代码生成的设计要求。 - Handling Constants in HDL and HLS Code Generation
Usecoder.constandcoder.loadto handle constants during code generation. - Mapping of Different Rounding and Overflow Methods from MATLAB to HLS
Mapping rounding and overflow methods from MATLAB to High-Level Synthesis (HLS). - Replace Arithmetic Operation to Generate Efficient HDL and High-Level Synthesis Code
Best practices for using division operation in your MATLAB code for HDL and High-Level Synthesis (HLS) code generation.
基础硬件建模
- Model a Counter for HDL and High-Level Synthesis Code Generation
To write MATLAB code that models hardware and is suitable for HDL and High-Level Synthesis (HLS) code generation, use this design pattern. - Model a State Machine for HDL and High-Level Synthesis Code Generation
The following design pattern shows MATLAB examples of Mealy and Moore state machines which are suitable for HDL and High-Level Synthesis (HLS) code generation.
