Setup and Configuration

Install hardware support and configure hardware connection on Intel^® SoC device

Download and configure Intel FPGA boards for use with SoC Blockset™ workflows.

Functions

`socSDCardImage`	Get SD card image path (Since R2024a)
`socWriteSDCardImage`	Write board-specific SD card image files to host SD card location (Since R2024a)

Topics

Supported Third-Party Tools and Hardware
List of supported third-party tools and hardware devices.
Install Support for Intel Devices
Instructions to install support for Intel devices.
Set Up Intel Devices
Setup, configure, and verify your Intel SoC devices.
Configure Network Interface Card (NIC) on Development Computer
Configure a Network Interface Card (NIC) on development computer to connect to hardware board.

Troubleshooting

Configure Network Interface Card (NIC) on Development Computer

Configure a Network Interface Card (NIC) on development computer to connect to hardware board.

Command Line Session with Intel Device

Instructions on how to open a command line session to an Intel SoC device.

Sending PING Request to Intel SoC Device

Process to PING an Intel SoC hardware board connected to your development computer.

Featured Examples

Streaming Data from Hardware to Software

A systematic approach to design the data-path between hardware logic (FPGA) and embedded processor using SoC Blockset™.

Open Script

Streaming Data from Software to Hardware

Design the data-path from an embedded processor to hardware logic (FPGA) using SoC Blockset™. Design and simulate the entire application comprising of FPGA and processor algorithms, memory interface, and task scheduling to meet the system requirements. Then, validate the design on hardware by generating code from the model and implementing it on a System-on-Chip (SoC) device.

Open Script

Triggering Software Tasks by FPGA Interrupts

Model an algorithm partitioned between hardware and software. The hardware IP is implemented in FPGA fabric, and triggers a software task implemented in the embedded processor. Design, simulate, and implement a complete design on SoC hardware.

Open Script

Random Access of External Memory

Model external memory accesses from FPGA for rotating an ASCII art image. Many applications require FPGA to access memory in random fashion as per the requirements of algorithm. You will learn how to design memory address generation along with other AXI4 master signals to read and write specific regions of memory using SoC Blockset. You will simulate, implement and verify your design on hardware.

Open Script