实时仿真
通过部署被控对象模型，您可以测试您的控制算法。您可以部署 Simscape Electrical™ 模型进行实时仿真，包括使用生成的 C 代码或 HDL 代码进行硬件在环 (HIL) 仿真。
生成 C 代码以部署需要 20 μs 或更长的仿真采样时间的非线性、线性或线性切换模型。如果您拥有 Simulink Coder™ 许可证，您可以生成用于部署到实时目标计算机中的 C 代码。如果您拥有 Embedded Coder® 许可证，您可以生成用于部署到嵌入式系统中的 C 代码。如果您拥有 Simulink Real-Time 许可证，您可以使用 Simscape 检查项以使您的 Simscape Electrical 模型做好生成代码的准备。然后，您可以使用 Simulink Real-Time Explorer 来执行以下操作：
在开发计算机上生成并编译代码。
将实时应用程序下载到目标计算机。
从开发计算机远程执行实时应用程序。
生成 HDL 代码以部署需要 1 µs 或更长的仿真采样时间的线性或线性切换模型。如果您拥有 HDL Coder™ 许可证，通过使用 Simscape HDL 工作流顾问您可以从 Simscape Electrical 模型生成 HDL 代码，而不需要先将模型转换为 Simulink 模型。sschdladvisor 函数生成与 HDL 代码兼容的版本的模型。然后，您可以从 HDL 实现模型生成代码，并将被控对象模型部署到 FPGA 进行 HIL 仿真。
主题
- Choose Between CPU and FPGA for HIL Simulation
Choose hardware for hardware-in-the-loop (HIL) simulations by balancing timing requirements, complexity, and cost for your application.
- Generate HDL Code for FPGA Platforms from Simscape Models
Learn how to convert Simscape models to HDL Code for FPGA Deployment.
- Generate and Validate HDL Code for Simscape Model (HDL Coder)
Generate HDL code from Simscape switched linear models.
- Improve FPGA Sampling Frequency of HDL Implementation Model Generated from Simscape Algorithm (HDL Coder)
Oversampling in generated HDL implementation model, and relation between model sample time and sample time of original Simscape algorithm.
- Validate HDL Implementation Model to Simscape Algorithm (HDL Coder)
Validate and resolve simulation mismatch between Simscape algorithm and HDL implementation model.
- Modeling Guidelines for Simscape Subsystem Replacement (HDL Coder)
Simscape modeling best practices for replacing Simscape subsystem with state-space algorithm.
精选示例
Generate HDL Code for Simscape Models by Using Dynamic Switch Approximation
Generate HDL code and synthesize the results for a three-phase PMSM drive using Dynamic Switch Approximation method.
Resonant LLC Converter for Real-Time FPGA Deployment
Model a resonant LLC converter by using Simscape switches, generate HDL code and synthesize the results for real-time simulation.
Generate SystemVerilog DPI Component from Simscape
Generate a SystemVerilog DPI component for an analog circuit that you model with Simscape™ Electrical™. You can then incorporate the generated DPI component into mixed-signal simulation environments for architectural exploration and verification. This workflow enables you to reuse the system-level circuit models and reduce overall debug and verification time.
Generate Optimized Simscape Three-Phase PMSM Drive Model for Real-Time FPGA HIL Deployment
Optimize three-phase PMSM model from a Simscape model for HDL code generation and FPGA deployment.
