I can create bussed signals on an outout port of a System Composer Component by assigning multiple internal ports to the output using dot notation e.g. output_bus.unit1, output_bus.unit2 etc.
If I route this one output port to another Component(receiving component) I am able to route internally to that component to multiple sub components using the same dot notation on signal names. they will match the ones i put in the sending block.
If I have multiple components needing to send to the one input port of the receiving component block i must use the Interface Adapter block. However, the hierachy of bussed signals does not appear in the inputs list of the Adapter when edited; the only way I can make hierarchy appear is to use an interface definition on the port. Furthermore when using a multiple input adapter block, the only way to have a bussed signal appear as the output is again to define an interface definition with hierarchy. This seems cumbersome and how do i ensure names given in dot notation within the Component Blocks are correctly propagated trough the adapters to the receiving block?
I am using 2020a.
