Xilinx system generator HW co-simulation the Drive DAC input and ADC output are missing

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Arash Jafari 2022-3-6

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https://ww2.mathworks.cn/matlabcentral/answers/1664914-xilinx-system-generator-hw-co-simulation-the-drive-dac-input-and-adc-output-are-missing

评论： Noam Levine 2022-3-7

sysgen.PNG

Hello,

I would like to perform HW co-simulation on my ZC706 Eval board using system generator, I found a video on youtube that performs HW co-simulation using kintex-7 DSP kit. here is the link to the video: https://www.youtube.com/watch?v=oJGHcl6Vk4g

In the video, the In and Out Gateway interfaces from the system generator blockset in Simulink have an option called Drive DAC input and Drive ADC output, respectively.The screenshot is attached. In this way the Simulink model can be verified on FPGA platform and RF transceiver easily using system generator.

Why do my system generator In and Out - Gateways interfaces have not this option?

Is it possible to perform HW co-simulation for ZC706 evaluation board in combination with ADRV9002 RF transciever(mixed signal system) using system generator?

Thank you in advance!

Kind Regards

Arash

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Noam Levine 2022-3-7

Arash - That video was originally recorded in 2012 using a Kintex-7 programmed through Xilinx ISE. I do not believe that the same programming methodology holds for Zynq under Vivado. Happy to discuss co-simulation options with you off-line. Please reach out to me through adi-expert@mathworks.com.

Regards,

-noam

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