couldn't check dead logic

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Yubin Wu 2022-6-8

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https://ww2.mathworks.cn/matlabcentral/answers/1736145-couldn-t-check-dead-logic

评论： Pat Canny 2022-6-8

When I use design verifier for dead logic detection, the error is as follows(custom code analysis is checked)：

Design Verifier has stubbed calls to custom code

Component:sldv | Category:Design Verifier compatibility warning

Simulink Design Verifier cannot analyze some C/C++ code in the custom code. Simulink Design Verifier internally stubs the portion of custom code that is not compatible.

Component:sldv | Category:Design Verifier compatibility warning

Building model representation failed: Unexpected Standard exception from MEX file. What() is:Assertion failed in CG IR: B:\matlab\toolbox\sldv\src\sldv\utils\DesignRangeTransformModelHelper.cpp line 35 ! In insertInput: Assertion failed: v3 ..

Component:simulink | Category:Design Verifier compatibility error

Simulink Design Verifier failed to initialize: 'shift_app' is incompatible for design error detection with Simulink Design Verifier.

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Pat Canny 2022-6-8

Hi @Yubin Wu,

Did you consult our documentation for "Support Limitations and Considerations for S-Functions and C/C++ Code"?

If this does not help address the issue, then I recommend contacting MathWorks Technical Support. It would be difficult to troubleshoot this within MATLAB Answers.

Thanks.

@Pat Canny

Simulink Design Verifier Product Manager

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