signal over lapping in Down sampler output for ZYNQ FPGA
1 次查看(过去 30 天)
显示 更早的评论
I am trying to down sample a 4 MHz signal while the decimated output downsamples the signl in a way that signals of each 1 MHz is appeared in that sameband how can be this output changed dothat all the signlas in the 4 MHz band are represented in 1 MHz
0 个评论
回答(1 个)
Bharath Venkataraman
2022-6-17
Are you trying to implement a chaneelizer? If so, here is the behavioral version in DSP System Toolbox and its HDL equivalent.
4 个评论
Bharath Venkataraman
2022-6-21
I may not be the best person to help, so I suggest that you reach out to MathWorks support. They will be able to guide you to the right person.
另请参阅
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!