Generated number of Sync Processor isntructions exceeds the specified SyncInstructionNumber : Error in dnnfpga.apis.Workflow/compile
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Hi, while using the compile fonction from the package dlhdl, the function returns me the following error :
"""
Error using dnnfpga.compiler.codegenfpga
The generated number of Sync processor instructions '17523' exceeds the specified SyncInstructionNumber '8192'. To fix the problem, increase the value of SyncInstructionNumber in the dlhdl.ProcessorConfig.
Error in dnnfpga.apis.Workflow/compileNetwork
Error in dnnfpga.apis.Workflow/compile
"""
Problem is that I don't find any function to modify the "SyncInstructionNumber" in my processor config as the error recommand me to do.
Any idea ?
my code is :
hPC_opti = dlhdl.ProcessorConfig();
hPC_opti.ProcessorDataType = 'int8';
hPC_opti.setModuleProperty('conv','InputMemorySize',[127 127 3])
hPC_opti.setModuleProperty('conv','OutputMemorySize',[127 127 1]);
hPC_opti.setModuleProperty()
%hPC_opti2.optimizeConfigurationForNetwork(snet)
%hPC_opti2 = optimizeConfigurationForNetwork(hPC_opti,dlquantObj.NetworkObject)
%hPC_opti.ProcessorDataType
hPC_opti.estimatePerformance(dlquantObj)
hPC_opti.estimateResources
hTarget = dlhdl.Target("Xilinx",'Interface','Jtag')
hdlsetuptoolpath('ToolName','Xilinx Vivado','ToolPath','D:\Xilinx\Vivado\2020.1\bin');
dlhdl.buildProcessor(hPC_opti)
hW = dlhdl.Workflow('network', dlquantObj, 'Bitstream', 'D:\test\dlhdl_prj\dlprocessor.bit' ,'Target',hTarget);
dn = hW.compile
I am working with matlab r2022a.
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Yongsheng
2022-6-28
Hi Julien,
"SyncInstructionNumber" needs to be larger for network with more Conv Layers or Larger Conv Layers. So this error message is generated when the compiler detects the network is too big to fit in the default SyncInstructionNumber, which is 8192.
SyncInstructionNumber is a hidden property, you can use the following command to change its value, and create new bit-stream:
hPC_opti = dlhdl.ProcessorConfig();
hPC_opti.ProcessorDataType = 'int8';
hPC_opti.setModuleProperty('conv','InputMemorySize',[127 127 3])
hPC_opti.setModuleProperty('conv','OutputMemorySize',[127 127 1]);
% use this command to change SyncInstructionNumber value
hPC_opti.setModuleProperty('conv', 'SyncInstructionNumber', 18000);
dlhdl.buildProcessor(hPC_opti)
And then create target and workflow objects as in your code.
hdlsetuptoolpath('ToolName','Xilinx Vivado','ToolPath','D:\Xilinx\Vivado\2020.1\bin');
hTarget = dlhdl.Target("Xilinx",'Interface','Jtag')
hW = dlhdl.Workflow('network', dlquantObj, 'Bitstream', 'D:\test\dlhdl_prj\dlprocessor.bit' ,'Target',hTarget);
dn = hW.compile
hW.deploy
Please let me know how it works.
Thanks,
Yongsheng
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