Clock signal block simulation is different from practical analysis

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Mohd. Irfan
Mohd. Irfan 2022-8-3
回答： Shantanu Dixit 2024-9-6
was learning use of clock signal as can be seen from image by taking out the reminder of clock signal and constant.
In actual practise there should be sudden drop to zero at number 2 as remainder is zero during that scenario but, it started dropping before 2 (i.e.) at 1.8 that, too steeply not sudden.
Kindly give clarification regarding this
Data info:
Stop time :10
Decimation:10
Thank you

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回答（1 个）

Shantanu Dixit
Shantanu Dixit 2024-9-6
Hello Irfan,
The behaviour you're observing is expected due to the nature of numerical simulations in Simulink. The solver updates the simulation state based on the 'step size', which dictates how frequently the simulation state is computed which can affect the precision of events
In your case, the drop occurs before the expected point (at 1.8 instead of 2) because of the 'step size'. To address this, you can try reducing the step size of the solver. By doing so, the frequency of state updates is increased, allowing for a more precise capture of transitions. This should help in making the drop occur closer to the expected point.
step-size: www.mathworks.com/help/simulink/gui/fixedstepsizefundamentalsampletime.html

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