adi rf som gpio options
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hello ,
we are using the adi rf som hdl workflow advisor reference design in our project and we raised the need for gpio controller.
which gpio can we access on this board and how we access them ?
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Tom Richter
2023-12-4
Hi Raz,
Let me use a shipping example "HW/SW Co-Design QPSK Transmit and Receive Using Analog Devices AD9361/AD9364".
I changed the Target to ADI RF SOM. In HDL Workflow Advisor at 1.3 - Set Target Interface you can select some DIP Switches or Push Buttons as GPIOs for Inputs and LEDs for Outputs. You can also use External Port and provide a list of FPGA Pins at Interface Mapping: {'LSB',...,'MSB'}.
When you type something strange you get a message:
I just changed the overAir signal to be connected to PMOD P11-1 at FPGA pin AC18 (you can find it here) instead of using AXI4-lite. I know, this information can hardly be found in the documentation.
The IO Standard is set to a default setting for External Ports which is LVCMOS25 in this case. You will get a xdc-file:
Good luck,
Tom
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Tom Richter
2023-12-6
Hey Raz,
I googled your carrier board AES-PZDRCC-BRK-G and compared it with the one I have AES-PZSDRCC-FMC-G. You should have no problems because all the buttons, LEDs, switches, and ethernet are conected to the same SOM pins (here I was not sure first). That said, you should be able to do everything with our tools what is related to the ADI RF SOM as long as you have the 2x2 SDR version (ADRV9361-Z7035). Meanwhile, I also found that we support both carriers already: https://www.mathworks.com/help/supportpkg/xilinxzynqbasedradio/ug/hardware-and-software-requirements.html
For the carrier what I have I could also find the xdc on ADI GitHub. The default iostandard we use for external ports is the one from the FMC connector. You don't have such a connector but 162 User-IO pins. The xdc file for the BOB shows FPGA regular IOs where P2 and P13 use the same iostandard (the upper and lower long User-IO pins on your image).
Best regards,
Tom
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