Issue in connecting MATLAB and VIVADO

3 次查看(过去 30 天)
Dear Matlab users
We are facing a critical issue. We need your help :(
We plan to connect FPGA and MATLAB using Ethernet.
  1. Transmit signal data from MATLAB to the FPGA.
  2. Monitor the signal through the FPGA's ILA.
However, we are encountering an error in MATLAB where the signal data is not being output.
The error message is as follows.
-------------------------------------------------------------------
aximasterudp_mex
Can't Receive RTIOStream MAC IP Version Status Packet
ERROR:
hdlverifier.AXIMasterUDP/openConnection
ERROR:
hdlverifier.AXIMasterUDP
ERROR:
aximanager
ERROR:
DACADC_Test (line 59)
UDP = aximanager('xilinx', 'interface', 'UDP', 'DeviceAddress', '192.168.0.2');
----------------------------------------------------------------------
And we are using the "ZYNQ RFSoC UltraScale+'" board.
I suspect the problem might be related to the communication process during the connection between MATLAB and the FPGA via Ethernet.
It would be greatly appreciated if you could tell us what might be causing this issue and how we might resolve it.
If you are also unsure of the cause, please inform us about the MAC IP version status packet used in the FPGA or Matlab and provide guidance on the related parts.
Have a great day.

回答(1 个)

Ayush Singh
Ayush Singh 2024-5-14
The issue can be due to several factors ranging from network configuration, FPGA firmware setup, to MATLAB's configuration.
You can try out below possible troubleshooting steps to check if it resolve your issue:
  1. Ensure that the IP address you're using in your MATLAB command (`'DeviceAddress', '192.168.0.2'`) matches the IP address configured on the FPGA board. The FPGA board needs a static IP address that is reachable from the MATLAB host machine.
  2. Verify that both the MATLAB host machine and the FPGA board are on the same subnet, or appropriately routed so they can communicate.
  3. Try temporarily disabling the antivirus on your system as they sometimes block the commnication to see if the issue resolves.
  4. From your MATLAB host machine, try pinging the FPGA board's IP address (`ping 192.168.0.2`). Successful ping responses indicate that the network connection to the FPGA board is working at a basic level.
  5. Try a simple UDP test using MATLAB's basic UDP functions (`udpport`, `write`, `read`) to see if you can send and receive data to and from the FPGA's IP address without using `aximanager`. This can help isolate whether the issue is with the network setup or the specific `aximanager` setup.
Hope it helps you!

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