Using VHDL package files in Simulink

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Cort
Cort 2024-4-23
回答： AKennedy 2025-2-13
I would like to use a VHDL package file in my simulink model. I would like to read the variables from the VHDL package file and not import the constants to the workspace
Is there a way to use the constants established in the package file easily? Or should I just read them into the workspace?
I would like to avoid using the workspace if possible.

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回答（1 个）

AKennedy
AKennedy 2025-2-13
To use VHDL package constants directly in a Simulink model without importing them into the MATLAB workspace, you can
  • Use HDL Verifier: If you have access to the HDL Verifier toolbox, you can co-simulate your VHDL code with Simulink. This allows you to use VHDL code directly in your Simulink model.
  • HDL Coder: If you're generating HDL code from Simulink, you can use HDL Coder to include VHDL packages. This involves Custom Code Integration (Use the Custom Code tab in the HDL Coder configuration to specify VHDL packages or files that should be included during code generation).
  • If these options are unavailable, reading constants into the MATLAB workspace might be necessary as a workaround.

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